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Not only with the large host memory for supporting large scale graph processing, GPU-accelerated heterogeneous architecture can also provide a great potential for high-performance computing. However, few existing heterogeneous systems can…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-06-05 Xianliang Li

This study presents a novel computer architecture where a last level cache and a SIMD accelerator are replaced by an Associative Processor. Associative Processor combines data storage and data processing and provides parallel computational…

Hardware Architecture · Computer Science 2013-11-11 Leonid Yavits , Amir Morad , Ran Ginosar

Many HPC applications suffer from a bottleneck in the shared caches, instruction execution units, I/O or memory bandwidth, even though the remaining resources may be underutilized. It is hard for developers and runtime systems to ensure…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-17 Felippe V. Zacarias , Vinicius Petrucci , Rajiv Nishtala , Paul Carpenter , Daniel Mossé

Over the last three decades, innovations in the memory subsystem were primarily targeted at overcoming the data movement bottleneck. In this paper, we focus on a specific market trend in memory technology: 3D-stacked memory and caches. We…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-17 Jens Domke , Emil Vatai , Balazs Gerofi , Yuetsu Kodama , Mohamed Wahib , Artur Podobas , Sparsh Mittal , Miquel Pericàs , Lingqi Zhang , Peng Chen , Aleksandr Drozd , Satoshi Matsuoka

We describe a model that enables us to analyze the running time of an algorithm in a computer with a memory hierarchy with limited associativity, in terms of various cache parameters. Our model, an extension of Aggarwal and Vitter's I/O…

Hardware Architecture · Computer Science 2007-05-23 Sandeep Sen , Siddhartha Chatterjee , Neeraj Dumir

In this work, we propose FUSE, a novel GPU cache system that integrates spin-transfer torque magnetic random-access memory (STT-MRAM) into the on-chip L1D cache. FUSE can minimize the number of outgoing memory accesses over the…

Hardware Architecture · Computer Science 2019-03-12 Jie Zhang , Myoungsoo Jung , Mahmut Taylan Kandemir

While prior researches focus on CPU-based microservices, they are not applicable for GPU-based microservices due to the different contention patterns. It is challenging to optimize the resource utilization while guaranteeing the QoS for GPU…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-06 Wei Zhang , Quan Chen , Kaihua Fu , Ningxin Zheng , Zhiyi Huang , Jingwen Leng , Chao Li , Wenli Zheng , Minyi Guo

Disaggregation maps parts of an AI workload to different types of GPUs, offering a path to utilize modern heterogeneous GPU clusters. However, existing solutions operate at a coarse granularity and are tightly coupled to specific model…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-14 Tiancheng Hu , Jin Qin , Zheng Wang , Junhao Hu , Yuzheng Wang , Lei Chen , Yizhou Shan , Mingxing Zhang , Ting Cao , Chunwei Xia , Huimin Cui , Tao Xie , Chenxi Wang

An effective way to improve energy efficiency is to throttle hardware resources to meet a certain performance target, specified as a QoS constraint, associated with all applications running on a multicore system. Prior art has proposed…

Hardware Architecture · Computer Science 2019-11-14 Mehrzad Nejat , Madhavan Manivannan , Miquel Pericas , Per Stenstrom

This paper investigates the shared-memory Graph Transposition (GT) problem, a fundamental graph algorithm that is widely used in graph analytics and scientific computing. Previous GT algorithms have significant memory requirements that are…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-14 Mohsen Koohi Esfahani , Hans Vandierendonck

Traditional Retrieval-Augmented Generation (RAG) approaches generally assume that retrieval and generation occur on powerful servers removed from the end user. While this reduces local hardware constraints, it introduces significant…

Information Retrieval · Computer Science 2026-04-17 Julian Killingback , Ofer Meshi , Henry Li , Hamed Zamani , Maryam Karimzadehgan

Analyzing large-scale performance logs from GPU profilers often requires terabytes of memory and hours of runtime, even for basic summaries. These constraints prevent timely insight and hinder the integration of performance analytics into…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-27 Ankur Lahiry , Ayush Pokharel , Seth Ockerman , Amal Gueroudji , Line Pouchard , Tanzima Z. Islam

Recent advances in reprogrammable hardware (e.g., FPGAs) and memory technology (e.g., DDR4, HBM) promise to solve performance problems inherent to graph processing like irregular memory access patterns on traditional hardware (e.g., CPU).…

Hardware Architecture · Computer Science 2021-04-19 Jonas Dann , Daniel Ritter , Holger Fröning

We propose a GPU-accelerated distributed optimization algorithm for controlling multi-phase optimal power flow in active distribution systems with dynamically changing topologies. To handle varying network configurations and enable…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-15 Minseok Ryu , Geunyeong Byeon , Kibaek Kim

General trends in computer architecture are shifting more towards parallelism. Multicore architectures have proven to be a major step in processor evolution. With the advancement in multicore architecture, researchers are focusing on…

Hardware Architecture · Computer Science 2019-10-22 Arsalan Shahid , Muhammad Tayyab , Muhammad Yasir Qadri , Nadia N. Qadri , Jameel Ahmed

GPU hash tables are increasingly used to accelerate data processing, but their limited functionality restricts adoption in large-scale data processing applications. Current limitations include incomplete concurrency support and missing…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-24 Hunter McCoy , Prashant Pandey

Efficient data access in High-Performance Computing (HPC) systems is essential to the performance of intensive computing tasks. Traditional optimizations of the I/O stack aim to improve peak performance but are often workload specific and…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-21 Thomas Collignon , Kouds Halitim , Raphaël Bleuse , Sophie Cerf , Bogdan Robu , Éric Rutten , Lionel Seinturier , Alexandre van Kempen

To match the blooming demand of generative AI workloads, GPU designers have so far been trying to pack more and more compute and memory into single complex and expensive packages. However, there is growing uncertainty about the scalability…

Hardware Architecture · Computer Science 2025-04-30 Burcu Canakci , Junyi Liu , Xingbo Wu , Nathanaël Cheriere , Paolo Costa , Sergey Legtchenko , Dushyanth Narayanan , Ant Rowstron

Conventional cache models are not suited for real-time parallel processing because tasks may flush each other's data out of the cache in an unpredictable manner. In this way the system is not compositional so the overall performance is…

Hardware Architecture · Computer Science 2011-11-09 A. M. Molnos , M. J. M. Heijligers , S. D. Cotofana , J. T. J. Van Eijndhoven

We propose a server-based approach to manage a general-purpose graphics processing unit (GPU) in a predictable and efficient manner. Our proposed approach introduces a GPU server that is a dedicated task to handle GPU requests from other…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-05-14 Hyoseung Kim , Pratyush Patel , Shige Wang , Ragunathan , Rajkumar