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The performance gap between CPU and memory widens continuously. Choosing the best memory layout for each hardware architecture is increasingly important as more and more programs become memory bound. For portable codes that run across…

Particle transport simulations are a cornerstone of high-energy physics (HEP), constituting a substantial part of the computing workload performed in HEP. To boost the simulation throughput and energy efficiency, GPUs as accelerators have…

High Energy Physics - Experiment · Physics 2023-02-17 Bernhard Manfred Gruber , Guilherme Amadio , Stephan Hageböck

The library of practical abstractions (LIBPA) provides efficient implementations of conceptually simple abstractions, in the C programming language. We believe that the best library code is conceptually simple so that it will be easily…

cmp-lg · Computer Science 2009-09-25 Eric Sven Ristad , Peter N. Yianilos

Data Access will be the next generation data abstraction layer for EPICS. Its implementation in C++ brought up a number of issues that are related to object oriented technology's impact on CPU and memory usage. What is gained by the new…

Software Engineering · Computer Science 2007-05-23 R. Lange , J. Hill

Memory spatial errors, i.e., buffer overflow vulnerabilities, have been a well-known issue in computer security for a long time and remain one of the root causes of exploitable vulnerabilities. Most of the existing mitigation tools adopt a…

Cryptography and Security · Computer Science 2020-04-07 Dongwei Chen , Daliang Xu , Dong Tong , Kang Sun , Xuetao Guan , Chun Yang , Xu Cheng

Modern architectures require applications to make effective use of caches to achieve high performance and hide memory latency. This in turn requires careful consideration of placement of data in memory to exploit spatial locality, leverage…

Programming Languages · Computer Science 2019-01-24 Juliana Franco , Alexandros Tasos , Sophia Drossopoulou , Tobias Wrigstad , Susan Eisenbach

Low-rank adaptation (LoRA) is a predominant parameter-efficient finetuning method for adapting large language models (LLMs) to downstream tasks. Meanwhile, Compute-in-Memory (CIM) architectures demonstrate superior energy efficiency due to…

Computation and Language · Computer Science 2026-03-10 Taiqiang Wu , Chenchen Ding , Wenyong Zhou , Yuxin Cheng , Xincheng Feng , Shuqi Wang , Wendong Xu , Chufan Shi , Zhengwu Liu , Ngai Wong

Data movement in memory-intensive workloads, such as deep learning, incurs energy costs that are over three orders of magnitude higher than the cost of computation. Since these workloads involve frequent data transfers between memory and…

Hardware Architecture · Computer Science 2025-02-05 Bahareh Khabbazan , Marc Riera , Antonio González

As machine learning algorithms are shown to be an increasingly valuable tool, the demand for their access has grown accordingly. Oftentimes, it is infeasible to run inference with larger models without an accelerator, which may be…

Machine Learning · Computer Science 2025-06-03 Spencer Banasik

Productivity issues such as lengthy compilation and limited code reuse have restricted usage of field-programmable gate arrays (FPGAs), despite significant technical advantages. Recent work into overlays -- virtual coarse-grained…

Hardware Architecture · Computer Science 2017-05-09 David Wilson , Greg Stitt

Large Language Models (LLMs) are increasingly deployed on edge devices with Neural Processing Units (NPUs), yet the decode phase remains memory-intensive, limiting performance. Processing-in-Memory (PIM) offers a promising solution, but…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-18 Hai Huang

Large language model (LLM) inference has been a prevalent demand in daily life and industries. The large tensor sizes and computing complexities in LLMs have brought challenges to memory, computing, and databus. This paper proposes a…

Hardware Architecture · Computer Science 2025-09-19 Yimin Wang , Yue Jiet Chong , Xuanyao Fong

Processing-using-DRAM (PUD) architectures impose a restrictive data layout and alignment for their operands, where source and destination operands (i) must reside in the same DRAM subarray (i.e., a group of DRAM rows sharing the same row…

Hardware Architecture · Computer Science 2024-03-08 Geraldo F. Oliveira , Emanuele G. Esposito , Juan Gómez-Luna , Onur Mutlu

Low-level C programs remain highly vulnerable to out-of-bounds memory corruption. State-of-the-art precise defenses either introduce severe runtime overhead due to metadata memory lookups, or break standard C semantics by disallowing…

Cryptography and Security · Computer Science 2026-03-24 Piyus Kedia

Continuous knowledge updating for pre-trained large language models (LLMs) is increasingly necessary yet remains challenging. Although inference-time methods like In-Context Learning (ICL) and Retrieval-Augmented Generation (RAG) are…

Machine Learning · Computer Science 2026-05-07 Seungju Back , Dongwoo Lee , Naun Kang , Taehee Lee , S. K. Hong , Youngjune Gwon , Sungjin Ahn

There are numerous examples of problems in symbolic algebra in which the required storage grows far beyond the limitations even of the distributed RAM of a cluster. Often this limitation determines how large a problem one can solve in…

Distributed, Parallel, and Cluster Computing · Computer Science 2010-06-11 Daniel Kunkle

Structured sparsity enables deploying large language models (LLMs) on resource-constrained systems. Approaches like dense-to-sparse fine-tuning are particularly compelling, achieving remarkable structured sparsity by reducing the model size…

Hardware Architecture · Computer Science 2025-10-14 João Paulo Cardoso de Lima , Marc Dietrich , Jeronimo Castrillon , Asif Ali Khan

We present ShapeLib, the first method that leverages the priors of LLMs to design libraries of programmatic 3D shape abstractions. Our system accepts two forms of design intent: text descriptions of functions to include in the library and a…

Computer Vision and Pattern Recognition · Computer Science 2025-06-23 R. Kenny Jones , Paul Guerrero , Niloy J. Mitra , Daniel Ritchie

In recent years, various computing-in-memory (CIM) processors have been presented, showing superior performance over traditional architectures. To unleash the potential of various CIM architectures, such as device precision, crossbar size,…

Hardware Architecture · Computer Science 2024-05-09 Songyun Qu , Shixin Zhao , Bing Li , Yintao He , Xuyi Cai , Lei Zhang , Ying Wang

The efficiency of Large Language Model~(LLM) inference is often constrained by substantial memory bandwidth and capacity demands. Existing techniques, such as pruning, quantization, and mixture of experts/depth, reduce memory capacity…

Hardware Architecture · Computer Science 2025-04-23 Rui Xie , Asad Ul Haq , Linsen Ma , Yunhua Fang , Zirak Burzin Engineer , Liu Liu , Tong Zhang
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