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Decoder-only Transformer models such as GPT have demonstrated exceptional performance in text generation, by autoregressively predicting the next token. However, the efficacy of running GPT on current hardware systems is bounded by low…

Hardware Architecture · Computer Science 2024-04-16 Yuting Wu , Ziyu Wang , Wei D. Lu

In modern computer architectures, the performance of many memory-bound workloads (e.g., machine learning, graph processing, databases) is limited by the data movement bottleneck that emerges when transferring large amounts of data between…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-12 Pedro Carrinho , Hamid Moghadaspour , Oscar Ferraz , João Dinis Ferreira , Yann Falevoz , Vitor Silva , Gabriel Falcao

The emerging memristive Memory Processing Unit (mMPU) overcomes the memory wall through memristive devices that unite storage and logic for real processing-in-memory (PIM) systems. At the core of the mMPU is stateful logic, which is…

Hardware Architecture · Computer Science 2022-07-01 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a DRAM array's massive internal parallelism to execute very-wide data-parallel operations, in a single-instruction multiple-data (SIMD) fashion. However, DRAM…

Graph processing requires irregular, fine-grained random access patterns incompatible with contemporary off-chip memory architecture, leading to inefficient data access. This inefficiency makes graph processing an extremely memory-bound…

Hardware Architecture · Computer Science 2025-03-11 Changmin Shin , Jaeyong Song , Hongsun Jang , Dogeun Kim , Jun Sung , Taehee Kwon , Jae Hyung Ju , Frank Liu , Yeonkyu Choi , Jinho Lee

To index the increasing volume of data, modern data indexes are typically stored on SSDs and cached in DRAM. However, searching such an index has resulted in significant I/O traffic due to limited access locality and inefficient cache…

Hardware Architecture · Computer Science 2024-08-05 Yun-Chih Chen , Yuan-Hao Chang , Tei-Wei Kuo

Graph mining applications, such as subgraph pattern matching and mining, are widely used in real-world domains such as bioinformatics, social network analysis, and computer vision. Such applications are considered a new class of…

Hardware Architecture · Computer Science 2023-06-21 Jiya Su , Peng Jiang , Rujia Wang

Data movement in memory-intensive workloads, such as deep learning, incurs energy costs that are over three orders of magnitude higher than the cost of computation. Since these workloads involve frequent data transfers between memory and…

Hardware Architecture · Computer Science 2025-02-05 Bahareh Khabbazan , Marc Riera , Antonio González

Processing-in-memory (PIM) turns out to be a promising solution to breakthrough the memory wall and the power wall. While prior PIM designs yield successful implementation of bitwise Boolean logic operations locally in memory, it is…

Hardware Architecture · Computer Science 2018-09-25 Xin Ma , Liang Chang , Shuangchen Li , Lei Deng , Yufei Ding , Yuan Xie

Recently DRAM-based PIMs (processing-in-memories) with unmodified cell arrays have demonstrated impressive performance for accelerating AI applications. However, due to the very restrictive hardware constraints, PIM remains an accelerator…

Hardware Architecture · Computer Science 2023-10-17 Jaewoo Park , Sugil Lee , Jongeun Lee

Regular path queries (RPQs) in graph databases are bottlenecked by the memory wall. Emerging processing-in-memory (PIM) technologies offer a promising solution to dispatch and execute path matching tasks in parallel within PIM modules. We…

Databases · Computer Science 2024-03-18 Ruoyan Ma , Shengan Zheng , Guifeng Wang , Jin Pu , Yifan Hua , Wentao Wang , Linpeng Huang

The widespread adoption of Large Language Models (LLMs) has exponentially increased the demand for efficient serving systems. With growing requests and context lengths, key-value (KV)-related operations, including attention computation and…

Hardware Architecture · Computer Science 2026-02-13 Lian Liu , Shixin Zhao , Yutian Zhou , Yintao He , Mengdi Wang , Yinhe Han , Ying Wang

The expansion of long-context Large Language Models (LLMs) creates significant memory system challenges. While Processing-in-Memory (PIM) is a promising accelerator, we identify that it suffers from critical inefficiencies when scaled to…

Bulk bitwise operations, i.e., bitwise operations on large bit vectors, are prevalent in a wide range of important application domains, including databases, graph processing, genome analysis, cryptography, and hyper-dimensional computing.…

Low-cost, high-throughput DNA and RNA sequencing (HTS) data is the backbone of the life sciences. Genome sequencing is now becoming a part of Predictive, Preventive, Personalized, and Participatory (termed 'P4') medicine. All genomic data…

Processing-in-memory (PIM) reduces data movement by executing near memory, but our large-scale characterization on real PIM hardware shows that end-to-end performance is often limited by disjoint host and device address spaces that force…

Emerging Technologies · Computer Science 2025-11-20 I-Ting Lee , Bao-Kai Wang , Liang-Chi Chen , Wen Sheng Lim , Da-Wei Chang , Yu-Ming Chang , Chieng-Chung Ho

The vast amount of processing power and memory bandwidth provided by modern Graphics Processing Units (GPUs) make them a platform for data-intensive applications. The database community identified GPUs as effective co-processors for data…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-02 Bernd Amann , Youry Khmelevsky , Gaetan Hains

Digital processing-in-memory (PIM) architectures mitigate the memory wall problem by facilitating parallel bitwise operations directly within the memory. Recent works have demonstrated their algorithmic potential for accelerating…

Hardware Architecture · Computer Science 2024-10-01 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

In this paper, we propose PIM-LLM, a hybrid architecture developed to accelerate 1-bit large language models (LLMs). PIM-LLM leverages analog processing-in-memory (PIM) architectures and digital systolic arrays to accelerate low-precision…

Hardware Architecture · Computer Science 2025-04-04 Jinendra Malekar , Peyton Chandarana , Md Hasibul Amin , Mohammed E. Elbtity , Ramtin Zand

Processing in Memory (PIM) is a computing paradigm that promises enormous gain in processing speed by eradicating latencies in the typical von Neumann architecture. It has gained popularity owing to its throughput by embedding storage and…

Emerging Technologies · Computer Science 2016-02-09 P. P. Chougule , B. Sen , R. Mukherjee , V. C. Karade , P. S. Patil , T. D. Dongale , R. K. Kamat
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