Related papers: Design of an FPGA-based USB 3.0 device controller

Fine-grained runtime power management techniques could be promising solutions for power reduction. Therefore, it is essential to establish accurate power monitoring schemes to obtain dynamic power variation in a short period (i.e., tens or…

This work introduces a highly efficient implementation of the transformer architecture on a Field-Programmable Gate Array (FPGA) by using the \texttt{hls4ml} tool. Given the demonstrated effectiveness of transformer models in addressing a…

In the face of escalating complexity and size of contemporary FPGAs and circuits, routing emerges as a pivotal and time-intensive phase in FPGA compilation flows. In response to this challenge, we present an open-source parallel routing…

As modern FPGAs evolve to include more het- erogeneous processing elements, such as ARM cores, it makes sense to consider these devices as processors first and FPGA accelerators second. As such, the conventional FPGA develop- ment…

This paper introduces SpeedLLM, a neural network accelerator designed on the Xilinx Alevo U280 platform and optimized for the Tinyllama framework to enhance edge computing performance. Key innovations include data stream parallelism, a…

Custom experiment setups in physics often require control electronics to execute actions and measurements on a small time scale. When further constraints limit the experiment's environment, for example when the experiment is inside a…

Physical Unclonable Functions (PUFs) leverage signal variations that occur within the device as a source of entropy. On-chip instrumentation is utilized by some PUF architectures to measure and digitize these variations, which are then…

This paper focuses on the Field Programmable Gate Array (FPGA) design and implementation of intelligent control system applications on a chip, specifically fuzzy logic and genetic algorithm processing units. Initially, an overview of the…

In this paper we show how a deep-submicron FPGA can be modified to operate at extremely low temperatures through modifications in the supporting hardware and in the firmware programming it. Though FPGAs are not designed to operate at a few…

This paper presents a high speed and area efficient DWT processor based design for Image Compression applications. In this proposed design, pipelined partially serial architecture has been used to enhance the speed along with optimal…

Industrial Ethernet is a technology widely spread in factory floors and critical infrastructures where a high amount of data need to be collected and transported. Fiber optic networks at gigabit rates fit well with that type of environments…

Inspired by Wilkinson ADC method, we implement a fast linear discharge method based on FPGA to digitize nuclear pulse signal. In this scheme, we use a constant current source to discharge the charge on capacitor which is integrated by the…

In this work, we propose an architecture and methodology to design hardware/software systems for high-performance embedded computing on FPGA. The hardware side is based on a many-core architecture whose design is generated automatically…

In this work, we propose a configurable many-core overlay for high-performance embedded computing. The size of internal memory, supported operations and number of ports can be configured independently for each core of the overlay. The…

Due to the increasing heterogeneity in network user requirements, dynamically varying day to day network traffic patterns and delay in-network service deployment, there is a huge demand for scalability and flexibility in modern networking…

Intermittent computing systems operate by relying only on harvested energy accumulated in their tiny energy reservoirs, typically capacitors. An intermittent device dies due to a power failure when there is no energy in its capacitor and…

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…

Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGA designs have been used…

We have a FPGA design, we make it fast, efficient, and tested for a few important examples. Now we must infer a general solution to deploy in the data center. Here, we describe the FPGA DPUV3INT8 design and our compiler effort. The…

In next generation wireless communication system, wireless transceivers should be able to handle wideband input signals compromising of multiple communication standards.Such multi-standard wireless communication receivers (MWCRs) need…