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Intel Xeon Phi is a recently released high-performance coprocessor which features 61 cores each supporting 4 hardware threads with 512-bit wide SIMD registers achieving a peak theoretical performance of 1Tflop/s in double precision. Many…

Performance · Computer Science 2013-02-06 Erik Saule , Kamer Kaya , Umit V. Catalyurek

In High Performance Computing, systems are evaluated based on their computational throughput. However, performance in contemporary server processors is primarily limited by power and thermal constraints. Ensuring operation within a given…

Hardware Architecture · Computer Science 2021-10-26 Robert Schöne , Thomas Ilsche , Mario Bielert , Markus Velten , Markus Schmidl , Daniel Hackenberg

In recent years, secure multiparty computation (SMC) advanced from a theoretical technique to a practically applicable technology. Several frameworks were proposed of which some are still actively developed. We perform a first comprehensive…

Cryptography and Security · Computer Science 2019-01-10 Marcel von Maltitz , Georg Carle

Heterogeneous manycore architectures are the key to efficiently execute compute- and data-intensive applications. Through silicon via (TSV)-based 3D manycore system is a promising solution in this direction as it enables integration of…

Hardware Architecture · Computer Science 2020-12-09 Aqeeb Iqbal Arka , Biresh Kumar Joardar , Ryan Gary Kim , Dae Hyun Kim , Janardhan Rao Doppa , Partha Pratim Pande

The rising demand for energy-efficient edge AI systems (e.g., mobile agents/robots) has increased the interest in neuromorphic computing, since it offers ultra-low power/energy AI computation through spiking neural network (SNN) algorithms…

Neural and Evolutionary Computing · Computer Science 2026-01-06 Rachmad Vidya Wicaksana Putra , Pasindu Wickramasinghe , Muhammad Shafique

Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

Along with the progress of AI democratization, machine learning (ML) has been successfully applied to edge applications, such as smart phones and automated driving. Nowadays, more applications require ML on tiny devices with extremely…

Machine Learning · Computer Science 2021-11-15 Yuhong Song , Edwin Hsing-Mean Sha , Qingfeng Zhuge , Rui Xu , Yongzhuo Zhang , Bingzhe Li , Lei Yang

The upcoming integration of AI in the physical layer (PHY) of 6G radio access networks (RAN) will enable a higher quality of service in challenging transmission scenarios. However, deeply optimized AI-Native PHY models impose higher…

Hardware Architecture · Computer Science 2026-04-03 Marco Bertuletti , Yichao Zhang , Diyou Shen , Alessandro Vanelli-Coralli , Frank K. Gürkaynak , Luca Benini

Stencil computations are a fundamental kernel in scientific computing, critical for simulations in domains such as fluid dynamics and climate modeling. However, these computations are often memory-bound on traditional High-Performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-11 Elia Belli , Daniele De Sensi

No area of computing is hungrier for performance than High Performance Computing (HPC), the demands of which continue to be a major driver for processor performance and adoption of accelerators, and also advances in memory, storage, and…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-08-18 Pablo Ouro , Unai Lopez-Novoa , Martyn Guest

Bit-serial Processing-In-Memory (PIM) is an attractive paradigm for accelerator architectures, for parallel workloads such as Deep Learning (DL), because of its capability to achieve massive data parallelism at a low area overhead and…

Hardware Architecture · Computer Science 2023-11-21 Aman Arora , Jian Weng , Siyuan Ma , Tony Nowatzki , Lizy K. John

We investigate an approach that uses low-level analysis and the execution-cache-memory (ECM) performance model in combination with tuning of hardware parameters to lower energy requirements of memory-bound applications. The ECM model is…

Performance · Computer Science 2016-09-13 Johannes Hofmann , Dietmar Fey

Deploying deep neural networks (DNNs) on those resource-constrained edge platforms is hindered by their substantial computation and storage demands. Quantized multi-precision DNNs, denoted as MP-DNNs, offer a promising solution for these…

Hardware Architecture · Computer Science 2024-10-10 Chuanning Wang , Chao Fang , Xiao Wu , Zhongfeng Wang , Jun Lin

SU3\_Bench is a microbenchmark developed to explore performance portability across multiple programming models/methodologies using a simple, but nontrivial, mathematical kernel. This kernel has been derived from the MILC lattice quantum…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-24 Jesmin Jahan Tithi , Fabio Checconi , Douglas Doerfler , Fabrizio Petrini

Systolic arrays and shared-L1-memory manycore clusters are commonly used architectural paradigms that offer different trade-offs to accelerate parallel workloads. While the first excel with regular dataflow at the cost of rigid…

Hardware Architecture · Computer Science 2024-04-25 Sergio Mazzola , Samuel Riedel , Luca Benini

The Cray T3D, an MIMD system with NUMA shared memory capabilities and in principle very low communications latency, can support the Canopy framework for grid-oriented applications. CANOPY has been ported to the T3D, with the intent of…

High Energy Physics - Lattice · Physics 2009-10-28 Mark Fischler , Mike Uchima

Spiking neural networks (SNNs) are the third generation of neural networks and can explore both rate and temporal coding for energy-efficient event-driven computation. However, the decision accuracy of existing SNN designs is contingent…

Neural and Evolutionary Computing · Computer Science 2020-02-25 Changqing Xu , Wenrui Zhang , Yu Liu , Peng Li

We carry out a comparative performance study of multi-core CPUs, GPUs and Intel Xeon Phi (Many Integrated Core - MIC) with a microscopy image analysis application. We experimentally evaluate the performance of computing devices on core…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-05-15 George Teodoro , Tahsin Kurc , Guilherme Andrade , Jun Kong , Renato Ferreira , Joel Saltz

Ternary Deep Neural Networks (DNN) have shown a large potential for highly energy-constrained systems by virtue of their low power operation (due to ultra-low precision) with only a mild degradation in accuracy. To enable an…

Hardware Architecture · Computer Science 2024-08-27 Niharika Thakuria , Akul Malhotra , Sandeep K. Thirumala , Reena Elangovan , Anand Raghunathan , Sumeet K. Gupta

General matrix-matrix multiplication (GEMM) is a cornerstone of AI computations, making tensor processing engines (TPEs) increasingly critical in GPUs and domain-specific architectures. Existing architectures primarily optimize dataflow or…

Hardware Architecture · Computer Science 2025-03-11 Qizhe Wu , Huawen Liang , Yuchen Gui , Zhichen Zeng , Zerong He , Linfeng Tao , Xiaotian Wang , Letian Zhao , Zhaoxi Zeng , Wei Yuan , Wei Wu , Xi Jin