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Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement arbitrary-precision arithmetic operations, and can perform…

Hardware Architecture · Computer Science 2025-07-17 Junius Pun , Xilai Dai , Grace Zgheib , Mahesh A. Iyer , Andrew Boutros , Vaughn Betz , Mohamed S. Abdelfattah

Recent research has shown that large language models (LLMs) can utilize low-precision floating point (FP) quantization to deliver high efficiency while maintaining original model accuracy. In particular, recent works have shown the…

Hardware Architecture · Computer Science 2025-06-05 Faraz Tahmasebi , Yian Wang , Benji Y. H. Huang , Hyoukjun Kwon

In this paper, we propose a mixed-precision convolution unit architecture which supports different integer and floating point (FP) precisions. The proposed architecture is based on low-bit inner product units and realizes higher precision…

Hardware Architecture · Computer Science 2021-01-29 Hamzah Abdel-Aziz , Ali Shafiee , Jong Hoon Shin , Ardavan Pedram , Joseph H. Hassoun

The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of this hardware depend heavily upon cycle-accurate simulation of register-transfer-level…

Hardware Architecture · Computer Science 2024-02-09 Mahyar Emami , Sahand Kashani , Keisuke Kamahori , Mohammad Sepehr Pourghannad , Ritik Raj , James R. Larus

The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu

The edge computing paradigm has emerged to handle cloud computing issues such as scalability, security and low response time among others. This new computing trend heavily relies on ubiquitous embedded systems on the edge. Performance and…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-01-28 Mohammad Hosseinabady , Mohd Amiruddin Bin Zainol , Jose Nunez-Yanez

This paper presents a complete video fusion system with hardware acceleration and investigates the energy trade-offs between computing in the CPU or the FPGA device. The video fusion application is based on the Dual-Tree Complex Wavelet…

Hardware Architecture · Computer Science 2016-02-09 Jose Nunez-Yanez , Tom Sun

Modern multicore systems are migrating from homogeneous systems to heterogeneous systems with accelerator-based computing in order to overcome the barriers of performance and power walls. In this trend, FPGA-based accelerators are becoming…

Hardware Architecture · Computer Science 2020-09-04 Zhe Lin , Sharad Sinha , Hao Liang , Liang Feng , Wei Zhang

Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance requirements of state-of-the-art DL models, but the rapid pace of…

Hardware Architecture · Computer Science 2025-12-16 Andrew Boutros , Aman Arora , Vaughn Betz

Improvements in computer systems have historically relied on two well-known observations: Moore's law and Dennard's scaling. Today, both these observations are ending, forcing computer users, researchers, and practitioners to abandon the…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-05-05 Martin Karp , Artur Podobas , Niclas Jansson , Tobias Kenter , Christian Plessl , Philipp Schlatter , Stefano Markidis

The 2-D discrete wavelet transform (DWT) can be found in the heart of many image-processing algorithms. Until recently, several studies have compared the performance of such transform on various shared-memory parallel architectures,…

Performance · Computer Science 2017-05-30 David Barina , Michal Kula , Michal Matysek , Pavel Zemcik

This paper introduces the eGPU, a SIMT soft processor designed for FPGAs. Soft processors typically achieve modest operating frequencies, a fraction of the headline performance claimed by modern FPGA families, and obtain correspondingly…

Hardware Architecture · Computer Science 2023-07-18 Martin Langhammer , George Constantinides

Federated Learning (FL) has become a viable technique for realizing privacy-enhancing distributed deep learning on the network edge. Heterogeneous hardware, unreliable client devices, and energy constraints often characterize edge computing…

Machine Learning · Computer Science 2024-11-05 Herbert Woisetschläger , Alexander Erben , Ruben Mayer , Shiqiang Wang , Hans-Arno Jacobsen

Device Model Generalization (DMG) is a practical yet under-investigated research topic for on-device machine learning applications. It aims to improve the generalization ability of pre-trained models when deployed on resource-constrained…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-12-03 Zheqi Lv , Wenqiao Zhang , Shengyu Zhang , Kun Kuang , Feng Wang , Yongwei Wang , Zhengyu Chen , Tao Shen , Hongxia Yang , Beng Chin Ooi , Fei Wu

While there is a large body of research on efficient processing of deep neural networks (DNNs), ultra-low-latency realization of these models for applications with stringent, sub-microsecond latency requirements continues to be an…

Machine Learning · Computer Science 2021-04-13 Mahdi Nazemi , Arash Fayyazi , Amirhossein Esmaili , Atharva Khare , Soheil Nazar Shahsavani , Massoud Pedram

As FPGAs gain popularity for on-demand application acceleration in data center computing, dynamic partial reconfiguration (DPR) has become an effective fine-grained sharing technique for FPGA multiplexing. However, current FPGA sharing…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-30 Jianfeng Gu , Hao Wang , Xiaorang Guo , Martin Schulz , Michael Gerndt

Embedded Field-Programmable Gate Arrays (eFPGAs) allow for the design of hardware accelerators of edge Machine Learning (ML) applications at a lower power budget compared with traditional FPGA platforms. However, the limited eFPGA logic and…

Hardware Architecture · Computer Science 2025-02-13 Tousif Rahman , Gang Mao , Bob Pattison , Sidharth Maheshwari , Marcos Sartori , Adrian Wheeldon , Rishad Shafik , Alex Yakovlev

Digital twins (DTs) can enable precision healthcare by continually learning a mathematical representation of patient-specific dynamics. However, mission critical healthcare applications require fast, resource-efficient DT learning, which is…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-23 Bin Xu , Ayan Banerjee , Midhat Urooj , Sandeep K. S. Gupta

Neural architectures and hardware accelerators have been two driving forces for the progress in deep learning. Previous works typically attempt to optimize hardware given a fixed model architecture or model architecture given fixed…

To cope with the increasing demand and computational intensity of deep neural networks (DNNs), industry and academia have turned to accelerator technologies. In particular, FPGAs have been shown to provide a good balance between performance…

Hardware Architecture · Computer Science 2018-07-12 Yongming Shen , Tianchu Ji , Michael Ferdman , Peter Milder
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