Related papers: Multiple-Valued Logic Circuit Design and Data Tran…
A clear protocol for synthesis of sequential reversible circuits from any particular gate library has been provided. Using that protocol, reversible circuits for SR latch, D latch, JK latch and T latch are designed from NCT gate library.…
In this paper we present quaternary and ternary routing tracks for FPGAs, and their implementation in 28nm FDSOI technology. We discuss the transistor level design of multi-valued repeaters, multiplexers and translators, and specific…
This PhD dissertation investigates garbage-free reversible computing systems from abstract design to physical gate-level implementation. Designed in reversible logic, we propose a ripple-block carry adder and work towards a reversible…
As established in the seminal work by Berry et al.[1], expanding the time evolution operator using truncated Taylor series (up to some order $K$) makes a good candidate for simulating Hamiltonian dynamics. Here, we adapt the method but…
Given the stringent requirements of energy efficiency for Internet-of-Things edge devices, approximate multipliers, as a basic component of many processors and accelerators, have been constantly proposed and studied for decades, especially…
Modern internet of things (IoT) devices leverage machine learning inference using sensed data on-device rather than offloading them to the cloud. Commonly known as inference at-the-edge, this gives many benefits to the users, including…
Power modules with excellent inductance and temperature metrics are significant to meet the rising sophistication of energy demand in new technologies. In this paper, we use a surrogate-based approach to render optimal layouts of power…
In light of recent hardware advances, it is striking that real arithmetic in balanced ternary logic has received almost no attention in the literature. This is particularly surprising given ternary logic's promising properties, which could…
As fifth-generation (5G) and upcoming sixth-generation (6G) communications exhibit tremendous demands in providing high data throughput with a relatively low latency, millimeter-wave (mmWave) technologies manifest themselves as the key…
In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND…
With power consumption becoming a critical processor design issue, specialized architectures for low power processing are becoming popular. Several studies have shown that neural networks can be used for signal processing and pattern…
The MUX implementation of ternary half adders and full adders using predecessor and successor functions lead to the most efficient efficient implementation using the smallest transistor count. These designs are compared with the binary…
We propose and develop a concept of magnonic logic gates enabling reversible computing. The gates consist of passive elements: waveguides, cross-junctions and phase shifters. Logical 0 and 1 are encoded in the relative phase of the…
Plasmonic logic circuits combine ultrafast operation with nanoscale integration, making them a strong candidate for next-generation optical computing. Realizing this potential, however, requires overcoming practical challenges such as bulky…
Deploying Large Language Models (LLMs) efficiently on edge devices is often constrained by limited memory capacity and high power consumption. Low-bit quantization methods, particularly ternary quantization, have demonstrated significant…
This paper focuses on robust transceiver design for throughput enhancement on the interference channel (IC), under imperfect channel state information (CSI). In this paper, two algorithms are proposed to improve the throughput of the…
The modern power system is evolving with increasing penetration of power electronics introducing complicated electromagnetic phenomenon. Electromagnetic transient (EMT) simulation is essential to understand power system behavior under…
This study proposes a computationally efficient method for optimizing multi-zone thermostatically controlled loads (TCLs) by leveraging dimensionality reduction through an auto-encoder. We develop a multi-task learning framework to jointly…
Power loss in the electronic system is a very crucial limiting factor that can be reduced or minimized with the help of using the reversible logics "a concept came from Thermodynamics". In this paper the authors shows the concept of…
This paper presents a novel method to identify and insert redundant logic into a combinational circuit to improve its fault tolerance without having to replicate the entire circuit as is the case with conventional redundancy techniques. In…