English
Related papers

Related papers: An Algorithm-Hardware Co-design Framework to Overc…

200 papers

Deep Neural Networks (DNNs) have been widely deployed for many Machine Learning applications. Recently, CapsuleNets have overtaken traditional DNNs, because of their improved generalization ability due to the multi-dimensional capsules, in…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-26 Alberto Marchisio , Muhammad Abdullah Hanif , Muhammad Shafique

Low resolution analog-to-digital converters (ADCs) can be employed to improve the energy efficiency (EE) of a wireless receiver since the power consumption of each ADC is exponentially related to its sampling resolution and the hardware…

Signal Processing · Electrical Eng. & Systems 2020-03-11 Aryan Kaushik , Christos Tsinos , Evangelos Vlachos , John Thompson

The need to execute Deep Neural Networks (DNNs) at low latency and low power at the edge has spurred the development of new heterogeneous Systems-on-Chips (SoCs) encapsulating a diverse set of hardware accelerators. How to optimally map a…

DNNs deployed on analog processing in memory (PIM) architectures are subject to fabrication-time variability. We developed a new joint variability- and quantization-aware DNN training algorithm for highly quantized analog PIM-based models…

Machine Learning · Computer Science 2021-11-15 Zihao Deng , Michael Orshansky

The use of deep learning has grown at an exponential rate, giving rise to numerous specialized hardware and software systems for deep learning. Because the design space of deep learning software stacks and hardware accelerators is diverse…

Machine Learning · Computer Science 2020-10-06 Zhan Shi , Chirag Sakhuja , Milad Hashemi , Kevin Swersky , Calvin Lin

Deep neural networks (DNNs) have revolutionized the field of artificial intelligence and have achieved unprecedented success in cognitive tasks such as image and speech recognition. Training of large DNNs, however, is computationally…

Binary neural networks (BNNs) that use 1-bit weights and activations have garnered interest as extreme quantization provides low power dissipation. By implementing BNNs as computing-in-memory (CIM), which computes multiplication and…

Machine Learning · Computer Science 2021-10-20 Minh-Son Le , Thi-Nhan Pham , Thanh-Dat Nguyen , Ik-Joon Chang

Binary spatter code (BSC)-based hyperdimensional computing (HDC) is a highly error-resilient approximate computational paradigm suited for error-prone, emerging hardware platforms. In BSC HDC, the basic datatype is a hypervector, a…

Programming Languages · Computer Science 2024-02-21 Pu , Yi , Sara Achour

Using a very low-resolution analog-to-digital convertor (ADC) unit at each antenna can remarkably reduce the hardware cost and power consumption of a massive multiple-input multiple-output (MIMO) system. However, such a pure low-resolution…

Information Theory · Computer Science 2016-11-17 Ti-Cao Zhang , Chao-Kai Wen , Shi Jin , Tao Jiang

Terahertz (THz) communication is envisioned as a key technology for 6G and beyond wireless systems owing to its multi-GHz bandwidth. To maintain the same aperture area and the same link budget as the lower frequencies, ultra-massive…

Information Theory · Computer Science 2024-11-25 Wenqi Zhao , Chong Han , Ho-Jin Song , Emil Björnson

Over the past few years, silicon photonics-based computing has emerged as a promising alternative to CMOS-based computing for Deep Neural Networks (DNN). Unfortunately, the non-linear operations and the high-precision requirements of DNNs…

Architectures that incorporate Computing-in-Memory (CiM) using emerging non-volatile memory (NVM) devices have become strong contenders for deep neural network (DNN) acceleration due to their impressive energy efficiency. Yet, a significant…

Hardware Architecture · Computer Science 2024-01-12 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

A trend towards energy-efficiency, security and privacy has led to a recent focus on deploying DNNs on microcontrollers. However, limits on compute and memory resources restrict the size and the complexity of the ML models deployable in…

Machine Learning · Computer Science 2020-10-19 Fernando García-Redondo , Shidhartha Das , Glen Rosendale

Deploying mixed-precision neural networks on edge devices is friendly to hardware resources and power consumption. To support fully mixed-precision neural network inference, it is necessary to design flexible hardware accelerators for…

Hardware Architecture · Computer Science 2025-02-04 Liang Zhao , Kunming Shao , Fengshi Tian , Tim Kwang-Ting Cheng , Chi-Ying Tsui , Yi Zou

Deploying deep neural networks (DNNs) across homogeneous edge devices (the devices with the same SKU labeled by the manufacturer) often assumes identical performance among them. However, once a device model is widely deployed, the…

Hardware Architecture · Computer Science 2025-12-16 Kunlong Zhang , Guiying Li , Ning Lu , Peng Yang , Ke Tang

Processing-in-memory (PIM) is a transformative architectural paradigm designed to overcome the Von Neumann bottleneck. Among PIM architectures, digital SRAM-PIM emerges as a promising solution, offering significant advantages by directly…

Hardware Architecture · Computer Science 2025-06-13 Cenlin Duan , Jianlei Yang , Yikun Wang , Yiou Wang , Yingjie Qi , Xiaolin He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weisheng Zhao

Deep Neural Networks (DNNs) excel in learning hierarchical representations from raw data, such as images, audio, and text. To compute these DNN models with high performance and energy efficiency, these models are usually deployed onto…

Machine learning based on neural networks has advanced rapidly, but the high energy consumption required for training and inference remains a major challenge. Hyperdimensional Computing (HDC) offers a lightweight, brain-inspired alternative…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-10 Wakuto Matsumi , Riaz-Ul-Haque Mian

Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular…

Hardware Architecture · Computer Science 2025-11-26 Youngsuk Kim , Junghwan Lim , Hyuk-Jae Lee , Chae Eun Rhee

As the machine learning and systems communities strive to achieve higher energy-efficiency through custom deep neural network (DNN) accelerators, varied bit precision or quantization levels, there is a need for design space exploration…

Hardware Architecture · Computer Science 2022-05-27 Ahmet Inci , Siri Garudanagiri Virupaksha , Aman Jain , Venkata Vivek Thallam , Ruizhou Ding , Diana Marculescu