English
Related papers

Related papers: SASA: A Scalable and Automatic Stencil Acceleratio…

200 papers

Due to the emergence of embedded applications in image and video processing, communication and cryptography, improvement of pictorial information for better human perception like deblurring, denoising in several fields such as satellite…

Hardware Architecture · Computer Science 2014-04-16 Chandrajit Pal , Avik Kotal , Asit Samanta , Amlan Chakrabarti , Ranjan Ghosh

Top-K SpMV is a key component of similarity-search on sparse embeddings. This sparse workload does not perform well on general-purpose NUMA systems that employ traditional caching strategies. Instead, modern FPGA accelerator cards have a…

Hardware Architecture · Computer Science 2021-03-09 Alberto Parravicini , Luca Giuseppe Cellamare , Marco Siracusa , Marco Domenico Santambrogio

We describe ASAGA, an asynchronous parallel version of the incremental gradient algorithm SAGA that enjoys fast linear convergence rates. Through a novel perspective, we revisit and clarify a subtle but important technical issue present in…

Optimization and Control · Mathematics 2017-11-09 Rémi Leblond , Fabian Pedregosa , Simon Lacoste-Julien

The growing demand for efficient long-sequence modeling on edge devices has propelled widespread adoption of State Space Models (SSMs) like Mamba, due to their superior computational efficiency and scalability. As its autoregressive…

Hardware Architecture · Computer Science 2025-09-25 Linfeng Zhong , Songqiang Xu , Huifeng Wen , Tong Xie , Qingyu Guo , Yuan Wang , Meng Li

Hardware accelerators are essential for achieving low-latency, energy-efficient inference in edge applications like image recognition. Spiking Neural Networks (SNNs) are particularly promising due to their event-driven and temporally sparse…

Neural and Evolutionary Computing · Computer Science 2026-02-25 Alessio Caviglia , Filippo Marostica , Alessio Carpegna , Alessandro Savino , Stefano Di Carlo

This paper presents Systolic-CNN, an OpenCL-defined scalable, run-time-flexible FPGA accelerator architecture, optimized for accelerating the inference of various convolutional neural networks (CNNs) in multi-tenancy cloud/edge computing.…

Hardware Architecture · Computer Science 2020-12-08 Akshay Dua , Yixing Li , Fengbo Ren

Accelerated computing is widely used in high-performance computing. Therefore, it is crucial to experiment and discover how to better utilize GPUGPUs latest generations on relevant applications. In this paper, we present results and share…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-08-13 Baodi Shan , Mauricio Araya-Polo

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…

Hardware Architecture · Computer Science 2023-04-26 Murat Isik , Kayode Inadagbo , Hakan Aktas

Time Series Analysis (TSA) is a critical workload to extract valuable information from collections of sequential data, e.g., detecting anomalies in electrocardiograms. Subsequence Dynamic Time Warping (sDTW) is the state-of-the-art…

This work presents a GPU thread mapping approach that allows doing fast parallel stencil-like computations on discrete fractals using their compact representation. The intuition behind is to employ two GPU tensor-core accelerated thread…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-26 Felipe A. Quezada , Cristóbal A. Navarro

With the increase in the computation intensity of the chip, the mismatch between computation layer shapes and the available computation resource significantly limits the utilization of the chip. Driven by this observation, prior works…

Hardware Architecture · Computer Science 2024-02-20 Jinming Zhuang , Zhuoping Yang , Shixin Ji , Heng Huang , Alex K. Jones , Jingtong Hu , Yiyu Shi , Peipei Zhou

Stencil computation constitutes a cornerstone of scientific computing, serving as a critical kernel in domains ranging from fluid dynamics to weather simulation. While stencil computations are conventionally regarded as memory-bound and…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-03-03 Qiqi Gu , Chenpeng Wu , Heng Shi , Jianguo Yao , Haibing Guan

Real-time Deep Neural Network (DNN) inference with low-latency requirement has become increasingly important for numerous applications in both cloud computing (e.g., Apple's Siri) and edge computing (e.g., Google/Waymo's driverless car).…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-11 Weiwen Jiang , Edwin H. -M. Sha , Xinyi Zhang , Lei Yang , Qingfeng Zhuge , Yiyu Shi , Jingtong Hu

Subgraph matching is a basic operation widely used in many applications. However, due to its NP-hardness and the explosive growth of graph data, it is challenging to compute subgraph matching, especially in large graphs. In this paper, we…

Databases · Computer Science 2021-02-25 Xin Jin , Zhengyi Yang , Xuemin Lin , Shiyu Yang , Lu Qin , You Peng

Frameworks for the agile development of modern system-on-chips are crucial to dealing with the complexity of designing such architectures. The open-source Vespa framework for designing large, FPGA-based, multi-core heterogeneous…

Hardware Architecture · Computer Science 2025-01-07 Gabriele Montanaro , Andrea Galimberti , Davide Zoni

Prior work on Automatically Scalable Computation (ASC) suggests that it is possible to parallelize sequential computation by building a model of whole-program execution, using that model to predict future computations, and then…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-21 Peter Kraft , Amos Waterland , Daniel Y Fu , Anitha Gollamudi , Shai Szulanski , Margo Seltzer

Stereo matching is a critical task for robot navigation and autonomous vehicles, providing the depth estimation of surroundings. Among all stereo matching algorithms, Efficient Large-scale Stereo (ELAS) offers one of the best tradeoffs…

Hardware Architecture · Computer Science 2021-04-13 Tian Gao , Zishen Wan , Yuyang Zhang , Bo Yu , Yanjun Zhang , Shaoshan Liu , Arijit Raychowdhury

Selective state space models (SSMs) have rapidly become a compelling backbone for large language models, especially for long-context workloads. Yet in deployment, their inference performance is often bounded by the memory capacity,…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-25 Anurag Dutt , Nimit Shah , Hazem Masarani , Anshul Gandhi

Probabilistic bits (p-bits) offer an energy-efficient hardware abstraction for stochastic optimization; however, existing p-bit-based simulated annealing accelerators suffer from poor scalability and limited support for fully connected…

Hardware Architecture · Computer Science 2026-02-19 Naoya Onizawa , Taiga Kubuta , Duckgyu Shin , Takahiro Hanyu

Path planning is critical for autonomous driving, generating smooth, collision-free, feasible paths based on perception and localization inputs. However, its computationally intensive nature poses significant challenges for…

Hardware Architecture · Computer Science 2025-07-23 Yifan Zhang , Xiaoyu Niu , Hongzheng Tian , Yanjun Zhang , Bo Yu , Shaoshan Liu , Sitao Huang