Related papers: A lightweight, user-configurable detector ASIC dig…
Modern X-ray detector systems urgently require compact, efficient, and fast data compression schemes to handle the transmission of big data from pixel arrays, enabling frame rates in the MHz regime. In this work, a data compression ASIC…
The continued desire for X-ray pixel detectors with higher frame rates will stress the ability of application-specific integrated circuit (ASIC) designers to provide sufficient off-chip bandwidth to reach continuous frame rates in the 1 MHz…
Scientific detectors are a key technological enabler for many disciplines. Application-specific integrated circuits (ASICs) are used for many of these scientific detectors. Until recently, pixel detector ASICs have been used mainly for…
Despite advances in the programmable logic capabilities of modern trigger systems, a significant bottleneck remains in the amount of data to be transported from the detector to off-detector logic where trigger decisions are made. We…
Learned image compression (LIC) methods often employ symmetrical encoder and decoder architectures, evitably increasing decoding time. However, practical scenarios demand an asymmetric design, where the decoder requires low complexity to…
Ptychography is a computational imaging technique that has risen in popularity in the x-ray and electron microscopy communities in the past half decade. One of the reasons for this success is the development of new high performance electron…
In order to take full advantage of the U.S. Department of Energy's billion-dollar investments into the next-generation research infrastructure (e.g., exascale, light sources, colliders), advances are required not only in detector technology…
This paper presents a low-power ECG recording system-on-chip (SoC) with on-chip low-complexity lossless ECG compression for data reduction in wireless/ambulatory ECG sensor devices. The chip uses a linear slope predictor for data…
A hybrid pixel detector based on the concept of simultaneous charge integration and photon counting will be presented. The second generation of a counting and integrating X-ray prototype CMOS chip (CIX) has been operated with different…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
This paper presents a low power ECG recording Sys-tem-on-Chip (SoC) with on-chip low complexity lossless ECG compression for data reduction in wireless/ambulatory ECG sensor devices. The proposed algorithm uses a linear slope predictor to…
We characterize a new x-ray Mixed-Mode Pixel Array Detector (MM-PAD-2.1) Application Specific Integrated Circuit (ASIC). Using an integrating pixel front-end with dynamic charge removal architecture, the MM-PAD-2.1 ASIC extends the maximum…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
Ultra-low bitrate image compression (below 0.05 bits per pixel) is increasingly critical for bandwidth-constrained and computation-limited encoding scenarios such as edge devices. Existing frameworks typically rely on large pretrained…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
In the era of multinational cooperation, gathering and analyzing the satellite images are getting easier and more important. Typical procedure of the satellite image analysis include transmission of the bulky image data from satellite to…
Detectors at future high energy colliders will face enormous technical challenges. Disentangling the unprecedented numbers of particles expected in each event will require highly granular silicon pixel detectors with billions of readout…
A reliable and cost-effective interconnect technology is required for the development of hybrid pixel detectors. The interconnect technology needs to be adapted for the pitch and die sizes of the respective applications. For small-scale…
Lossy compression algorithms aim to compactly encode images in a way which enables to restore them with minimal error. We show that a key limitation of existing algorithms is that they rely on error measures that are extremely sensitive to…
We present the first physical realization of in-pixel signal processing with integrated AI-based data filtering for particle tracking detectors. Building on prior work that demonstrated a physics-motivated edge-AI algorithm suitable for…