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With the rapid advent of generative models, efficiently deploying these models on specialized hardware has become critical. Tensor Processing Units (TPUs) are designed to accelerate AI workloads, but their high power consumption…

Hardware Architecture · Computer Science 2025-03-04 Zhantong Zhu , Hongou Li , Wenjie Ren , Meng Wu , Le Ye , Ru Huang , Tianyu Jia

The new generation of machine learning processors have evolved from multi-core and parallel architectures that were designed to efficiently implement matrix-vector-multiplications (MVMs). This is because at the fundamental level, neural…

Machine Learning · Computer Science 2020-11-06 Nazreen P. M. , Shantanu Chakrabartty , Chetan Singh Thakur

Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks and can yield significant performance and energy improvements…

Hardware Architecture · Computer Science 2022-05-24 Christina Giannoula , Ivan Fernandez , Juan Gómez-Luna , Nectarios Koziris , Georgios Goumas , Onur Mutlu

Multi-scalar multiplication (MSM) is crucial in cryptographic applications and computationally intensive in zero-knowledge proofs. MSM involves accumulating the products of scalars and points on an elliptic curve over a 377-bit modulus, and…

Hardware Architecture · Computer Science 2025-02-18 Ayumi Ohno , Kotaro Shimamura , Shinya Takamaeda-Yamazaki

Matrix multiplication is a foundational operation in scientific computing and machine learning, yet its computational complexity makes it a significant bottleneck for large-scale applications. The shift to parallel architectures, primarily…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-30 Mufakir Qamar Ansari , Mudabir Qamar Ansari

Processing-in-memory (PIM) turns out to be a promising solution to breakthrough the memory wall and the power wall. While prior PIM designs yield successful implementation of bitwise Boolean logic operations locally in memory, it is…

Hardware Architecture · Computer Science 2018-09-25 Xin Ma , Liang Chang , Shuangchen Li , Lei Deng , Yufei Ding , Yuan Xie

In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable…

All-pairs shortest paths (APSP) remains a major bottleneck for large-scale graph analytics, as data movement with cubic complexity overwhelms the bandwidth of conventional memory hierarchies. In this work, we propose RAPID-Graph to address…

Hardware Architecture · Computer Science 2026-01-29 Yanru Chen , Zheyu Li , Keming Fan , Runyang Tian , John Hsu , Weihong Xu , Minxuan Zhou , Tajana Rosing

Bulk-bitwise processing-in-memory (PIM), an emerging computational paradigm utilizing memory arrays as computational units, has been shown to benefit database applications. This paper demonstrates how GROUP-BY and JOIN, database operations…

Hardware Architecture · Computer Science 2023-11-03 Ben Perach , Ronny Ronen , Shahar Kvatinsky

In-memory computing hardware accelerators allow more than 10x improvements in peak efficiency and performance for matrix-vector multiplications (MVM) compared to conventional digital designs. For this, they have gained great interest for…

Hardware Architecture · Computer Science 2024-09-19 Pouya Houshmand , Marian Verhelst

The performance and efficiency of running large-scale datasets on traditional computing systems exhibit critical bottlenecks due to the existing "power wall" and "memory wall" problems. To resolve those problems, processing-in-memory (PIM)…

Hardware Architecture · Computer Science 2022-04-22 Yinglin Zhao , Jianlei Yang , Bing Li , Xingzhou Cheng , Xucheng Ye , Xueyan Wang , Xiaotao Jia , Zhaohao Wang , Youguang Zhang , Weisheng Zhao

Inefficient data transfer between computation and memory inspired emerging processing-in-memory (PIM) technologies. Many PIM solutions enable storage and processing using memristors in a crossbar-array structure, with techniques such as…

Hardware Architecture · Computer Science 2021-05-11 Orian Leitersdorf , Ben Perach , Ronny Ronen , Shahar Kvatinsky

Maximal Biclique Enumeration (MBE) holds critical importance in graph theory with applications extending across fields such as bioinformatics, social networks, and recommendation systems. However, its computational complexity presents…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-23 Chou-Ying Hsieh , Chia-Ming Chang , Po-Hsiu Cheng , Sy-Yen Kuo

In recent decades, High Performance Computing (HPC) has undergone significant enhancements, particularly in the realm of hardware platforms, aimed at delivering increased processing power while keeping power consumption within reasonable…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-03 S. -Kazem Shekofteh , Christian Alles , Nils Kochendörfer , Holger Fröning

Today's fast linear algebra and numerical optimization tools have pushed the frontier of model predictive control (MPC) forward, to the efficient control of highly nonlinear and hybrid systems. The field of hybrid MPC has demonstrated that…

Optimization and Control · Mathematics 2020-05-11 Jia-Jie Zhu , Georg Martius

Recent advances in machine learning (ML) have spotlighted the pressing need for computing architectures that bridge the gap between memory bandwidth and processing power. The advent of deep neural networks has pushed traditional Von Neumann…

Hardware Architecture · Computer Science 2024-07-12 Febin Sunny , Amin Shafiee , Abhishek Balasubramaniam , Mahdi Nikdast , Sudeep Pasricha

Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Matrix-multiplication units (MXUs) are now prevalent in every computing platform. The key attribute that makes MXUs so successful is the semiring structure, which allows tiling for both parallelism and data reuse. Nonetheless,…

Hardware Architecture · Computer Science 2022-09-02 Yunan Zhang , Po-An Tsai , Hung-Wei Tseng

Processing-in-memory (PIM) architectures have demonstrated great potential in accelerating numerous deep learning tasks. Particularly, resistive random-access memory (RRAM) devices provide a promising hardware substrate to build PIM…

Hardware Architecture · Computer Science 2022-02-01 Weidong Cao , Yilong Zhao , Adith Boloor , Yinhe Han , Xuan Zhang , Li Jiang

In-memory computing is an emerging non-von Neumann computing paradigm where certain computational tasks are performed in memory by exploiting the physical attributes of the memory devices. Memristive devices such as phase-change memory…

Emerging Technologies · Computer Science 2020-04-08 Anastasios Petropoulos , Irem Boybat , Manuel Le Gallo , Evangelos Eleftheriou , Abu Sebastian , Theodore Antonakopoulos