Related papers: Real-Time Waveform Matching with a Digitizer at 10…
At present, fast waveform digitizing circuit is more and more employed in modern physics experiments for processing the signals from an array detector. A new fast waveform sampling digitizing circuit developed by us is presented in this…
Attacks based on side-channel analysis (SCA) pose a severe security threat to modern computing platforms, further exacerbated on IoT devices by their pervasiveness and handling of private and critical data. Designing SCA-resistant computing…
In this paper, we propose and evaluate two novel double-sequence low-resolution frequency synchronization methods in millimeter-wave (mmWave) systems. In our system model, the base station uses analog beams to send the synchronization…
Time interleaved analog-to-digital conversion (TIADC) based on parallelism is an effective way to meet the requirement of the ultra-fast waveform digitizer beyond Gsps. Different methods to correct the mismatch errors among different…
The arm race between hardware security engineers and side-channel researchers has become more competitive with more sophisticated attacks and defenses in the last decade. While modern hardware features improve the system performance…
Time-tagging units and coincidence detectors are used in many scientific research fields. The required timing resolution and number of input channels are varying, but some emerging experiments in the field of quantum optics require up to 32…
Side Channel Analysis (SCA) presents a clear threat to privacy and security in modern computing systems. The vast majority of communications are secured through cryptographic algorithms. These algorithms are often provably-secure from a…
Side-channel attacks allow extracting secret information from the execution of cryptographic primitives by correlating the partially known computed data and the measured side-channel signal. However, to set up a successful side-channel…
With today's increasing demand for digital devices in Substation Automation Systems (SAS) based on the IEC61850 standard, the measured data error due to the synchronization problem should be considered as a significant problem in…
Side-channel attacks pose significant challenges to the security of embedded systems, often allowing attackers to circumvent encryption algorithms in minutes compared to the trillions of years required for brute-force attacks. To mitigate…
The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in large-area time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 micron CMOS process. On each of 6 analog…
The prospect of pileup induced backgrounds at the High Luminosity LHC (HL-LHC) has stimulated intense interest in technology for charged particle timing at high rates\cite{challenge}. In this paper I report on a framework for fast timing…
This study presents a novel field-programmable gate array (FPGA)-based Time-to-Digital Converter (TDC) design suitable for high timing resolution applications, utilizing two new techniques. First, a cross-detection (CD) method is introduced…
The paper presents the design and measurement results of a transient waveform recording ASIC based on the Switched Capacitor Array (SCA) architecture. This 0.18 {\mu}m CMOS prototype device contains two channels and each channel employs a…
This work presents a fully-digital high-accuracy real-time calibration procedure for frequency and time alignment of open-loop wirelessly coordinated coherent distributed antenna array (CDA) modems, enabling radio frequency (RF) phase…
In this paper we illustrate techniques for digitized waveform signal processing of fast timing detectors. In the example discussed here, timing analysis of SiPM signals in the presence of high Dark Count Rates, a large data set of digitized…
1 ps timing resolution is the entry point to signature based searches relying on secondary/tertiary vertices and particle identification. We describe a preliminary design for PSEC5, an 8-channel 40 GS/s waveform-sampling ASIC in the TSMC 65…
We present the design of a new $\mu$TCA-based waveform digitizer, which will be deployed in the Muon g-2 experiment at Fermilab and will allow our pileup identification requirement to be met. This digitizer features five independent…
This manuscript describes a radiation-hardened current-mode delta-sigma ADC fabricated in a standard 130 nm CMOS technology and qualified for total ionizing doses up to 100 Mrad. The operational signal range achieved with a 100 s…
An ultra-high-speed waveform digitizer prototype based on gigabit Ethernet has been developed. The prototype is designed to read out signals of detectors to realize the accurate measurement of various physical quantities for plasma…