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We introduce Mirage Persistent Kernel (MPK), the first compiler and runtime system that automatically transforms multi-GPU model inference into a single high-performance megakernel. MPK introduces an SM-level graph representation that…

A new Muon-to-Central-Trigger Processor Interface (MUCTPI) was built as part of the upgrade of the ATLAS Level-1 trigger system for the next Run of the Large Hadron Collider at CERN. The MUCTPI has 208 high-speed optical serial links for…

TMAC is a toolbox written in C++11 that implements algorithms based on a set of modern methods for large-scale optimization. It covers a variety of optimization problems, which can be both smooth and nonsmooth, convex and nonconvex, as well…

Optimization and Control · Mathematics 2016-06-16 Brent Edmunds , Zhimin Peng , Wotao Yin

With the advent of hundreds of cores on a chip to accelerate applications, the operating system (OS) needs to exploit the existing parallelism provided by the underlying hardware resources to determine the right amount of processes to be…

Operating Systems · Computer Science 2025-01-07 Yao Xiao , Nikos Kanakaris , Anzhe Cheng , Chenzhong Yin , Nesreen K. Ahmed , Shahin Nazarian , Andrei Irimia , Paul Bogdan

While there exist many isolation mechanisms that are available to cloud service providers, including virtual machines, containers, etc., the problem of side-channel increases in importance as a remaining security vulnerability, particularly…

Cryptography and Security · Computer Science 2017-09-01 Read Sprabery , Konstantin Evchenko , Abhilash Raj , Rakesh B. Bobba , Sibin Mohan , Roy H. Campbell

Now days, manufacturers are focusing on increasing the concurrency in multiprocessor system-on-a-chip (MPSoC) architecture instead of increasing clock speed, for embedded systems. Traditionally lock-based synchronization is provided to…

Hardware Architecture · Computer Science 2012-02-06 Shaily Mittal , Nitin

This paper presents a multithread and efficient cryptographic hardware access (MECHA) for efficient and fast cryptographic operations that eliminates the need for context switching. Utilizing a UNIX domain socket, MECHA manages multiple…

Cryptography and Security · Computer Science 2025-06-19 Pratama Derry , Laksmono Agus Mahardika Ari , Iqbal Muhammad , Howon Kim

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on the industry-supported open-source CVA6 core and its…

Recent announcements have shown the viability of end-to-end open-source (OS) Linux-capable RISC-V systems on chip (SoCs). However, practical application and software development platforms require efficient non-volatile storage, which is not…

Hardware Architecture · Computer Science 2026-03-13 Axel Vanoni , Philippe Sauter , Paul Scheffler , Anton Buchner , Micha Wehrli , Thomas Benz , Luca Benini

The next-generation Industrial Internet of Things (IIoT) inherently requires smart devices featuring rich connectivity, local intelligence, and autonomous behavior. Emerging Multiprocessor System-on-Chip (MPSoC) platforms along with…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-01-21 Alessandro Cilardo , Marcello Cinque , Luigi De Simone , Nicola Mazzocca

The recent exponential growth of Large Language Models (LLMs) has relied on GPU-based systems. However, CPUs are emerging as a flexible and lower-cost alternative, especially when targeting inference and reasoning workloads. RISC-V is…

Machine Learning · Computer Science 2025-03-25 Javier J. Poveda Rodrigo , Mohamed Amine Ahmdi , Alessio Burrello , Daniele Jahier Pagliari , Luca Benini

SymJAX is a symbolic programming version of JAX simplifying graph input/output/updates and providing additional functionalities for general machine learning and deep learning applications. From an user perspective SymJAX provides a la…

Mathematical Software · Computer Science 2020-05-22 Randall Balestriero

We present Swallow, a scalable many-core architecture, with a current configuration of 480 x 32-bit processors. Swallow is an open-source architecture, designed from the ground up to deliver scalable increases in usable computational power…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-04-27 Simon J. Hollis , Steve Kerrison

Multi-core, Mixed Criticality Embedded (MCE) real-time systems require high timing precision and predictability to guarantee there will be no interference between tasks. These guarantees are necessary in application areas such as avionics…

Hardware Architecture · Computer Science 2016-06-29 Steve Kerrison , David May , Kerstin Eder

This work presents the design, implementation, and evaluation of a LoRa-based mesh network using the Meshtastic protocol for Smart Campus applications at Universidad Militar Nueva Granada (UMNG). The system integrates heterogeneous hardware…

Networking and Internet Architecture · Computer Science 2026-05-21 Rafael Garzon Andosilla , José de Jesús Rugeles Uribe

Security-Enhanced Linux (SELinux) is a Linux kernel module that allows for a role-based access control (RBAC) mechanism. It provides a fine-grained security framework enabling system administrators to define security policies at the system…

Cryptography and Security · Computer Science 2023-12-11 Divyam Pahuja , Alvin Tang , Klim Tsoutsman

Domain-Specific architectures with accelerators for machine learning and signal processing require efficient bulk data movement and high-bandwidth access to large datasets. Such capabilities are often absent from minimal open-source…

Hardware Architecture · Computer Science 2026-03-16 Philippe Sauter , Thomas Benz , Paul Scheffler , Luca Benini

Blockchain technology constitutes a paradigm shift in the way we conceive distributed architectures. A Blockchain system lets us build platforms where data are immutable and tamper-proof, with some constraints on the throughput and the…

Software Engineering · Computer Science 2023-08-31 Marco Fiore , Marina Mongiello , Giuseppe Acciani

The open-source RISC-V ISA is gaining traction, both in industry and academia. The ISA is designed to scale from micro-controllers to server-class processors. Furthermore, openness promotes the availability of various open-source and…

Hardware Architecture · Computer Science 2019-11-26 Florian Zaruba , Luca Benini

MGSim is an open source discrete event simulator for on-chip hardware components, developed at the University of Amsterdam. It is intended to be a research and teaching vehicle to study the fine-grained hardware/software interactions on…

Hardware Architecture · Computer Science 2013-02-07 Mike Lankamp , Raphael Poss , Qiang Yang , Jian Fu , Irfan Uddin , Chris R. Jesshope