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We present a bounded model checking algorithm for signal temporal logic (STL) that exploits mixed-integer linear programming (MILP). A key technical element is our novel MILP encoding of the STL semantics; it follows the idea of stable…

Systems and Control · Electrical Eng. & Systems 2024-08-14 Sota Sato , Jie An , Zhenya Zhang , Ichiro Hasuo

In logics for the strategic reasoning the main challenge is represented by their verification in contexts of imperfect information and perfect recall. In this work, we show a technique to approximate the verification of Alternating-time…

Multiagent Systems · Computer Science 2023-06-19 Angelo Ferrando , Vadim Malvone

In distributed systems with processes that do not share a global clock, \emph{partial synchrony} is achieved by clock synchronization that guarantees bounded clock skew among all applications. Existing solutions for distributed runtime…

Logic in Computer Science · Computer Science 2024-08-12 Borzoo Bonakdarpour , Anik Momtaz , Dejan Ničković , N. Ege Saraç

Mechanized verification of liveness properties for infinite programs with effects and nondeterminism is challenging. Existing temporal reasoning frameworks operate at the level of models such as traces and automata. Reasoning happens at a…

Programming Languages · Computer Science 2025-08-22 Eleftherios Ioannidis , Yannick Zakowski , Steve Zdancewic , Sebastian Angel

In this paper, we consider the robot motion (or task) planning problem under some given time bounded high level specifications. We use metric interval temporal logic (MITL), a member of the temporal logic family, to represent the task…

Systems and Control · Computer Science 2016-03-30 Yuchen Zhou , Dipankar Maity , John S. Baras

Signal Temporal Logic (STL) is a widely recognized formal specification language to express rigorous temporal requirements on mixed analog signals produced by cyber-physical systems (CPS). A relevant problem in CPS design is how to…

Logic in Computer Science · Computer Science 2025-07-30 Beatrice Melani , Ezio Bartocci , Michele Chiari

Synthesis of models and strategies is a very important problem in software engineering. The main element here is checking the satisfiability of formulae expressing the specification of a system to be implemented. This paper puts forward a…

Logic in Computer Science · Computer Science 2020-02-11 Magdalena Kacprzak , Artur Niewiadomski , Wojciech Penczek

Many Cyber Physical System (CPS) work in a safety-critical environment, where correct execution, reliability and trustworthiness are essential. Signal Temporal Logic (STL) provides a formal framework for checking safety-critical CPS.…

Formal Languages and Automata Theory · Computer Science 2026-03-27 Partha Roop , Sobhan Chatterjee , Avinash Malik , Nathan Allen , Logan Kenwright

This paper describes a technique for inferring temporal-logic properties for sets of finite data streams. Such data streams arise in many domains, including server logs, program testing, and financial and marketing data; temporal-logic…

Logic in Computer Science · Computer Science 2020-06-09 Samuel Huang , Rance Cleaveland

In this paper, we provide a Dynamic Programming algorithm for on-line monitoring of the state robustness of Metric Temporal Logic specifications with past time operators. We compute the robustness of MTL with unbounded past and bounded…

Systems and Control · Computer Science 2014-08-04 Adel Dokhanchi , Bardh Hoxha , Georgios Fainekos

Signal Temporal Logic (STL) is a convenient formalism to express bounded horizon properties of autonomous critical systems. STL extends LTL to real-valued signals and associates a non-singleton bound interval to each temporal operators. In…

Logic in Computer Science · Computer Science 2023-11-17 Céline Bellanger , Pierre-Loïc Garoche , Matthieu Martel , Célia Picard

Large Language Models (LLMs) increasingly rely on long-form, multi-step reasoning to solve complex tasks such as mathematical problem solving and scientific question answering. Despite strong performance, existing confidence estimation…

Computation and Language · Computer Science 2026-01-21 Zhenjiang Mao , Anirudhh Venkat , Artem Bisliouk , Akshat Kothiyal , Sindhura Kumbakonam Subramanian , Saithej Singhu , Ivan Ruchkin

Signal Temporal Logic (STL) is a formal language for describing a broad range of real-valued, temporal properties in cyber-physical systems. While there has been extensive research on verification and control synthesis from STL…

While most approaches in formal methods address system correctness, ensuring robustness has remained a challenge. In this paper we present and study the logic rLTL which provides a means to formally reason about both correctness and…

Logic in Computer Science · Computer Science 2022-01-20 Tzanis Anevlavis , Matthew Philippe , Daniel Neider , Paulo Tabuada

Large Language Models (LLMs) have shown impressive performance in mathematical reasoning tasks when guided by Chain-of-Thought (CoT) prompting. However, they tend to produce highly confident yet incorrect outputs, which poses significant…

Machine Learning · Computer Science 2025-06-11 Zhenjiang Mao , Artem Bisliouk , Rohith Reddy Nama , Ivan Ruchkin

Signal temporal logic (STL) was introduced for monitoring temporal properties of continuous-time signals for continuous and hybrid systems. Differential dynamic logic (dL) was introduced to reason about the end states of a hybrid program.…

Logic in Computer Science · Computer Science 2021-03-17 Hammad Ahmad , Jean-Baptiste Jeannin

We propose algorithms for performing model checking and control synthesis for discrete-time uncertain systems under linear temporal logic (LTL) specifications. We construct temporal logic trees (TLT) from LTL formulae via reachability…

Systems and Control · Electrical Eng. & Systems 2020-07-07 Yulong Gao , Alessandro Abate , Frank J. Jiang , Mirco Giacobbe , Lihua Xie , Karl H. Johansson

We present a monitoring approach for verifying systems at runtime. Our approach targets systems whose components communicate with the monitors over unreliable channels, where messages can be delayed or lost. In contrast to prior works,…

Logic in Computer Science · Computer Science 2017-07-19 David Basin , Felix Klaedtke , Eugen Zălinescu

Signal Temporal Logic (STL) is a widely adopted specification language in cyber-physical systems for expressing critical temporal requirements, such as safety conditions and response time. However, STL's expressivity is not sufficient to…

Logic in Computer Science · Computer Science 2025-04-15 Hongkai Chen , Zeyu Zhang , Shouvik Roy , Ezio Bartocci , Scott A. Smolka , Scott D. Stoller , Shan Lin

Alternating-time temporal logic (ATL) allows to specify requirements on abilities that different agents should (or should not) possess in a multi-agent system. However, model checking ATL specifications in realistic systems is…

Multiagent Systems · Computer Science 2016-08-31 Wojciech Jamroga , Michał Knapik , Damian Kurpiewski