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Modern multi-core processors share cache resources for maximum cache utilization and performance gains. However, this leaves the cache vulnerable to side-channel attacks, where timing differences in shared cache behavior are exploited to…

Cryptography and Security · Computer Science 2019-09-23 Ghada Dessouky , Tommaso Frassetto , Ahmad-Reza Sadeghi

New algorithms and optimization techniques are needed to balance the accelerating trend towards bandwidth-starved multicore chips. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the…

Performance · Computer Science 2012-03-01 Markus Wittmann , Georg Hager , Gerhard Wellein

Decentralized coded caching scheme, introduced by Maddah-Ali and Niesen, assumes that the caches are filled with no coordination. This work identifies a decentralized coded caching scheme -- under the assumption of uncoded placement -- for…

Information Theory · Computer Science 2021-01-26 Elizabath Peter , B. Sundar Rajan

WCET (Worst-Case Execution Time) estimation on multicore architecture is particularly challenging mainly due to the complex accesses over cache shared by multiple cores. Existing analysis identifies possible contentions between parallel…

Consolidating latency-critical (LC) and best-effort (BE) tenants at storage backend helps to increase resources utilization. Even if tenants use dedicated queues and threads to achieve performance isolation, threads are still contend for…

Performance · Computer Science 2021-06-18 Liuying Ma , Zhenqing Liu , Jin Xiong , Dejun Jiang

Traditional on-die, three-level cache hierarchy design is very commonly used but is also prone to latency, especially at the Level 2 (L2) cache. We discuss three distinct ways of improving this design in order to have better performance.…

Hardware Architecture · Computer Science 2021-01-26 Pranjal Singh Rajput , Sonnya Dellarosa , Kanya Satis

Large Language Models (LLMs) rely on optimizations like Automatic Prefix Caching (APC) to accelerate inference. APC works by reusing previously computed states for the beginning part of a request (prefix), when another request starts with…

Cryptography and Security · Computer Science 2026-05-21 Panagiotis Georgios Pennas , Konstantinos Papaioannou , Marco Guarnieri , Thaleia Dimitra Doudali

Multicore shared cache processors pose a challenge for designers of embedded systems who try to achieve minimal and predictable execution time of workloads consisting of several jobs. To address this challenge the cache is statically…

Data Structures and Algorithms · Computer Science 2012-11-26 Avinatan Hassidim , Haim Kaplan , Omry Tuval

The latest trends in high-performance computing systems show an increasing demand on the use of a large scale multicore systems in a efficient way, so that high compute-intensive applications can be executed reasonably well. However, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-02-25 Juliana M. N. Silva , Cristina Boeres , Lúcia M. A. Drummond , Artur A. Pessoa

Secure multi-party computation (MPC) facilitates privacy-preserving computation between multiple parties without leaking private information. While most secure deep learning techniques utilize MPC operations to achieve feasible…

Cryptography and Security · Computer Science 2024-07-30 Ke Lin , Yasir Glani , Ping Luo

This paper focuses on data structures for multi-core reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of an efficient solution is the storage of visited states. In related…

Distributed, Parallel, and Cluster Computing · Computer Science 2010-05-06 Alfons Laarman , Jaco van de Pol , Michael Weber

As capacity and complexity of on-chip cache memory hierarchy increases, the service cost to the critical loads from Last Level Cache (LLC), which are frequently repeated, has become a major concern. The processor may stall for a…

Hardware Architecture · Computer Science 2016-08-09 Navid Khoshavi , Xunchao Chen , Jun Wang , Ronald F. DeMara

We consider caching of video streams in a cellular network in which each base station is equipped with a cache. Video streams are partitioned into multiple substreams and the goal is to place substreams in caches such that the residual…

Networking and Internet Architecture · Computer Science 2019-03-07 Konstantin Avrachenkov , Jasper Goseling , Berksan Serbetci

Modern high-performance architectures employ large last-level caches (LLCs). While large LLCs can reduce average memory access latency for workloads with a high degree of locality, they can also increase latency for workloads with irregular…

Hardware Architecture · Computer Science 2025-11-26 Hoa Nguyen , Pongstorn Maidee , Jason Lowe-Power , Alireza Kaviani

Coded caching is a technique that leverages locally cached contents at the end users to reduce the network's peak-time communication load. Coded caching has been shown to achieve significant performance gains with a centralized placement…

Information Theory · Computer Science 2026-05-01 Yinbin Ma , Daniela Tuninetti

We make three observations in modern processors: (1) LLC capacity is getting larger (up to 1GB); (2) core counts are increasing (up to 128 cores), accumulating a more significant amount of private L2 cache capacity on the chip; and (3)…

Hardware Architecture · Computer Science 2023-03-01 Majid Jalili , Mattan Erez

Multi-Party Computation (MPC) is a technique enabling data from several sources to be used in a secure computation revealing only the result while protecting the original data, facilitating shared utilization of data sets gathered by…

Cryptography and Security · Computer Science 2020-07-03 Pierre-Francois Wolfe , Rushi Patel , Robert Munafo , Mayank Varia , Martin Herbordt

Common implementations of core memory allocation components, like the Linux buddy system, handle concurrent allocation/release requests by synchronizing threads via spin-locks. This approach is clearly not prone to scale with large thread…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-05-22 Romolo Marotta , Mauro Ianni , Alessandro Pellegrini , Andrea Scarselli , Francesco Quaglia

The Least-Recently Used cache replacement policy and its variants are widely deployed in modern processors. This paper shows for the first time in detail that the LRU states of caches can be used to leak information: any access to a cache…

Cryptography and Security · Computer Science 2020-01-06 Wenjie Xiong , Jakub Szefer

Caching systems using the Least Recently Used (LRU) principle have now become ubiquitous. A fundamental question for these systems is whether the cache space should be pooled together or divided to serve multiple flows of data item requests…

Performance · Computer Science 2017-08-08 Jian Tan , Guocong Quan , Kaiyi Ji , Ness Shroff