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Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). Exploiting data sparsity is a common approach to further accelerate GEMM…

Hardware Architecture · Computer Science 2020-10-14 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Training Convolutional Neural Networks (CNNs) usually requires a large number of computational resources. In this paper, \textit{SparseTrain} is proposed to accelerate CNN training by fully exploiting the sparsity. It mainly involves three…

Computer Vision and Pattern Recognition · Computer Science 2020-07-28 Pengcheng Dai , Jianlei Yang , Xucheng Ye , Xingzhou Cheng , Junyu Luo , Linghao Song , Yiran Chen , Weisheng Zhao

Convolutional neural networks (CNNs) have achieved great success in performing cognitive tasks. However, execution of CNNs requires a large amount of computing resources and generates heavy memory traffic, which imposes a severe challenge…

Hardware Architecture · Computer Science 2021-06-16 Jianlei Yang , Wenzhi Fu , Xingzhou Cheng , Xucheng Ye , Pengcheng Dai , Weisheng Zhao

CNNs outperform traditional machine learning algorithms across a wide range of applications. However, their computational complexity makes it necessary to design efficient hardware accelerators. Most CNN accelerators focus on exploring…

Hardware Architecture · Computer Science 2020-06-25 Ye Yu , Niraj K. Jha

Deep Convolutional Neural Networks (CNNs) have achieved state-of-the-art performance in a wide range of applications. However, deeper CNN models, which are usually computation consuming, are widely required for complex Artificial…

Systems and Control · Electrical Eng. & Systems 2020-01-08 Chaoyang Zhu , Kejie Huang , Shuyuan Yang , Ziqi Zhu , Hejia Zhang , Haibin Shen

Convolutional Neural Networks (CNNs) have emerged as a fundamental technology for machine learning. High performance and extreme energy efficiency are critical for deployments of CNNs in a wide range of situations, especially mobile…

This paper introduces the sparse periodic systolic (SPS) dataflow, which advances the state-of-the-art hardware accelerator for supporting lightweight neural networks. Specifically, the SPS dataflow enables a novel hardware design approach…

Computer Vision and Pattern Recognition · Computer Science 2022-07-04 Jung Hwan Heo , Arash Fayyazi , Amirhossein Esmaili , Massoud Pedram

Bit-serial architectures can handle Neural Networks (NNs) with different weight precisions, achieving higher resource efficiency compared with bit-parallel architectures. Besides, the weights contain abundant zero bits owing to the fault…

Hardware Architecture · Computer Science 2023-02-02 Wenhao Sun , Zhiwei Zou , Deng Liu , Wendi Sun , Song Chen , Yi Kang

With the ever-growing popularity of Artificial Intelligence, there is an increasing demand for more performant and efficient underlying hardware. Convolutional Neural Networks (CNN) are a workload of particular importance, which achieve…

Hardware Architecture · Computer Science 2023-07-18 Alexander Montgomerie-Corcoran , Zhewen Yu , Jianyi Cheng , Christos-Savvas Bouganis

This paper proposes a new hardware accelerator for sparse convolutional neural networks (CNNs) by building a hardware unit to perform the Image to Column (IM2COL) transformation of the input feature map coupled with a systolic array-based…

Hardware Architecture · Computer Science 2021-11-29 Mohammadreza Soltaniyeh , Richard P. Martin , Santosh Nagarakatte

Spectral-domain CNNs have been shown to be more efficient than traditional spatial CNNs in terms of reducing computation complexity. However they come with a `kernel explosion' problem that, even after compression (pruning), imposes a high…

Hardware Architecture · Computer Science 2023-10-18 Yue Niu , Rajgopal Kannan , Ajitesh Srivastava , Viktor Prasanna

Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). The systolic array (SA) is a pipelined 2D array of processing elements…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-19 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Compressing convolutional neural networks (CNNs) has received ever-increasing research focus. However, most existing CNN compression methods do not interpret their inherent structures to distinguish the implicit redundancy. In this paper,…

Computer Vision and Pattern Recognition · Computer Science 2019-04-02 Yuchao Li , Shaohui Lin , Baochang Zhang , Jianzhuang Liu , David Doermann , Yongjian Wu , Feiyue Huang , Rongrong Ji

Spiking Neural Networks (SNNs) are inspired by the sparse and event-driven nature of biological neural processing, and offer the potential for ultra-low-power artificial intelligence. However, realizing their efficiency benefits requires…

Hardware Architecture · Computer Science 2024-08-27 Ilkin Aliyev , Kama Svoboda , Tosiron Adegbija , Jean-Marc Fellous

Phenomenally successful in practical inference problems, convolutional neural networks (CNN) are widely deployed in mobile devices, data centers, and even supercomputers. The number of parameters needed in CNNs, however, are often large and…

Computer Vision and Pattern Recognition · Computer Science 2017-08-01 Jongsoo Park , Sheng Li , Wei Wen , Ping Tak Peter Tang , Hai Li , Yiran Chen , Pradeep Dubey

Spiking Neural Networks (SNNs), with brain-inspired structure using discrete spikes instead of continuous activations, are gaining attention for their efficient processing on neuromorphic chips. While current SNN hardware accelerators often…

Hardware Architecture · Computer Science 2026-01-30 Tenglong Li , Jindong Li , Guobin Shen , Dongcheng Zhao , Qian Zhang , Yi Zeng

Convolutional neural networks (CNNs) have become the dominant neural network architecture for solving many state-of-the-art (SOA) visual processing tasks. Even though Graphical Processing Units (GPUs) are most often used in training and…

Spiking Neural Network (SNN) inference has a clear potential for high energy efficiency as computation is triggered by events. However, the inherent sparsity of events poses challenges for conventional computing systems, driving the…

Hardware Architecture · Computer Science 2025-04-09 Simone Manoni , Paul Scheffler , Luca Zanatta , Andrea Acquaviva , Luca Benini , Andrea Bartolini

Sparse convolutional neural networks (CNNs) have gained significant traction over the past few years as sparse CNNs can drastically decrease the model size and computations, if exploited befittingly, as compared to their dense counterparts.…

Hardware Architecture · Computer Science 2021-11-10 Mahmood Azhar Qureshi , Arslan Munir

Spiking Neural Networks (SNNs) have become popular for their more bio-realistic behavior than Artificial Neural Networks (ANNs). However, effectively leveraging the intrinsic, unstructured sparsity of SNNs in hardware is challenging,…

Hardware Architecture · Computer Science 2024-02-12 Ilkin Aliyev , Tosiron Adegbija
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