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Related papers: HEAM: High-Efficiency Approximate Multiplier Optim…

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Deep neural networks (DNNs) have achieved great breakthroughs in many fields such as image classification and natural language processing. However, the execution of DNNs needs to conduct massive numbers of multiply-accumulate (MAC)…

Hardware Architecture · Computer Science 2024-11-07 Bo Liu , Grace Li Zhang , Xunzhao Yin , Ulf Schlichtmann , Bing Li

Deep neural networks (DNNs) offer plenty of challenges in executing efficient computation at edge nodes, primarily due to the huge hardware resource demands. The article proposes HYDRA, hybrid data multiplexing, and runtime layer…

Hardware Architecture · Computer Science 2026-03-31 Sonu Kumar , Komal Gupta , Gopal Raut , Mukul Lokhande , Santosh Kumar Vishvakarma

The Posit Number System was introduced in 2017 as a replacement for floating-point numbers. Since then, the community has explored its application in Neural Network related tasks and produced some unit designs which are still far from being…

Machine Learning · Computer Science 2021-09-08 Raul Murillo , Alberto A. Del Barrio , Guillermo Botella , Min Soo Kim , HyunJin Kim , Nader Bagherzadeh

Automatic algorithm-hardware co-design for DNN has shown great success in improving the performance of DNNs on FPGAs. However, this process remains challenging due to the intractable search space of neural network architectures and hardware…

Computer Vision and Pattern Recognition · Computer Science 2021-04-27 Zhen Dong , Yizhao Gao , Qijing Huang , John Wawrzynek , Hayden K. H. So , Kurt Keutzer

The use of low numerical precision is a fundamental optimization included in modern accelerators for Deep Neural Networks (DNNs). The number of bits of the numerical representation is set to the minimum precision that is able to retain…

Signal Processing · Electrical Eng. & Systems 2019-11-12 Franyell Silfa , Jose-Maria Arnau , Antonio Gonzàlez

In this paper, we present a novel technique to search for hardware architectures of accelerators optimized for end-to-end training of deep neural networks (DNNs). Our approach addresses both single-device and distributed pipeline and tensor…

Hardware Architecture · Computer Science 2024-04-24 Muhammad Adnan , Amar Phanishayee , Janardhan Kulkarni , Prashant J. Nair , Divya Mahajan

The use of lower precision has emerged as a popular technique to optimize the compute and storage requirements of complex Deep Neural Networks (DNNs). In the quest for lower precision, recent studies have shown that ternary DNNs (which…

Machine Learning · Computer Science 2020-05-06 Shubham Jain , Sumeet Kumar Gupta , Anand Raghunathan

This paper presents a novel architecture utilizing a 10T SRAM cell for XNOR-based in-memory computing, aimed at mitigating the extensive routing challenges typically encountered in conventional in-memory computing systems. By integrating a…

Hardware Architecture · Computer Science 2026-05-18 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

As a potential alternative for implementing the large number of multiplications in convolutional neural networks (CNNs), approximate multipliers (AMs) promise both high hardware efficiency and accuracy. However, the characterization of…

Hardware Architecture · Computer Science 2024-08-26 Ao Liu , Jie Han , Qin Wang , Zhigang Mao , Honglan Jiang

The design of approximate adders has been widely researched to advance energy-efficient hardware for computation-intensive multimedia applications, such as image, audio, or video processing. The design of approximate adders has been widely…

Hardware Architecture · Computer Science 2025-10-24 Hasnain A. Ziad , Ashiq A. Sakib

Despite their tremendous success and versatility, Deep Neural Networks (DNNs) such as Large Language Models (LLMs) suffer from inference inefficiency and rely on advanced computational infrastructure. To address these challenges and make…

Machine Learning · Computer Science 2025-05-05 Mohsen Dehghankar , Mahdi Erfanian , Abolfazl Asudeh

Electronic devices primarily aim to offer low power consumption, high speed, and a compact area. The performance of very large-scale integration (VLSI) devices is influenced by arithmetic operations, where multiplication is a crucial…

Hardware Architecture · Computer Science 2025-06-16 Ali Ranjbar , Elham Esmaeili , Roghayeh Rafieisangari , Nabiollah Shiri

The need to efficiently execute different Deep Neural Networks (DNNs) on the same computing platform, coupled with the requirement for easy scalability, makes Multi-Chip Module (MCM)-based accelerators a preferred design choice. Such an…

Hardware Architecture · Computer Science 2024-08-26 Abhijit Das , Enrico Russo , Maurizio Palesi

In recent years, processing in memory (PIM) based mixedsignal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN computations. However, PIM designs are sensitive to imperfections…

Hardware Architecture · Computer Science 2022-08-31 Payman Behnam , Uday Kamal , Saibal Mukhopadhyay

The rapid updates in error-resilient applications along with their quest for high throughput have motivated designing fast approximate functional units for Field-Programmable Gate Arrays (FPGAs). Studies that proposed imprecise functional…

Hardware Architecture · Computer Science 2022-06-29 Zahra Ebrahimi , Muhammad Zaid , Mark Wijtvliet , Akash Kumar

As the machine learning and systems communities strive to achieve higher energy-efficiency through custom deep neural network (DNN) accelerators, varied bit precision or quantization levels, there is a need for design space exploration…

Hardware Architecture · Computer Science 2022-05-27 Ahmet Inci , Siri Garudanagiri Virupaksha , Aman Jain , Venkata Vivek Thallam , Ruizhou Ding , Diana Marculescu

Recent studies from several hyperscalars pinpoint to embedding layers as the most memory-intensive deep learning (DL) algorithm being deployed in today's datacenters. This paper addresses the memory capacity and bandwidth challenges of…

Machine Learning · Computer Science 2019-08-27 Youngeun Kwon , Yunjae Lee , Minsoo Rhu

Approximate circuits have been developed to provide good tradeoffs between power consumption and quality of service in error resilient applications such as hardware accelerators of deep neural networks (DNN). In order to accelerate the…

Hardware Architecture · Computer Science 2020-07-06 Vojtech Mrazek , Lukas Sekanina , Zdenek Vasicek

Concise and reliable modeling for aggregating power flexibility of distributed energy resources in active distribution networks (ADNs) is a crucial technique for coordinating transmission and distribution networks. Our recent research has…

Systems and Control · Electrical Eng. & Systems 2023-12-11 Yilin Wen , Zechun Hu , Jinhua He , Yi Guo

Deep Neural Networks (DNNs) have shown significant advantages in a wide variety of domains. However, DNNs are becoming computationally intensive and energy hungry at an exponential pace, while at the same time, there is a vast demand for…