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This paper proposes an intelligent cache management strategy based on CNN-LSTM to improve the performance and cache hit rate of storage systems. Through comparative experiments with traditional algorithms (such as LRU and LFU) and other…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-11-20 Xiaoye Wang , Xuan Li , Linji Wang , Tingyi Ruan , Pochun Li

Image bitmaps have been widely used in in-memory applications, which consume lots of storage space and energy. Compared with legacy DRAM, non-volatile memories (NVMs) are suitable for bitmap storage due to the salient features in capacity…

Hardware Architecture · Computer Science 2019-05-08 Zhangyu Chen , Yu Hua , Pengfei Zuo , Yuanyuan Sun , Yuncheng Guo

The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part of the system energy consumption. Logic--In--Memory (LiM)…

Hardware Architecture · Computer Science 2023-04-14 Fabrizio Ottati , Giovanna Turvani , Marco Vacca , Guido Masera

DRAM-based main memories have read operations that destroy the read data, and as a result, must buffer large amounts of data on each array access to keep chip costs low. Unfortunately, system-level trends such as increased memory contention…

Hardware Architecture · Computer Science 2018-12-18 Justin Meza , Jing Li , Onur Mutlu

Advances in storage technology have introduced Non-Volatile Memory, NVM, as a new storage medium. NVM, along with Dynamic Random Access Memory (DRAM), Solid State Disk (SSD), and Disk present a system designer with a wide array of options…

Databases · Computer Science 2025-06-06 Shahram Ghandeharizadeh , Sandy Irani , Jenny Lam

This paper investigates hardware-based memory compression designs to increase the memory bandwidth. When lines are compressible, the hardware can store multiple lines in a single memory location, and retrieve all these lines in a single…

Hardware Architecture · Computer Science 2018-07-23 Vinson Young , Sanjay Kariyappa , Moinuddin K. Qureshi

The emerging hybrid DRAM-NVM architecture is challenging the existing memory management mechanism in operating system. In this paper, we introduce memos, which can schedule memory resources over the entire memory hierarchy including cache,…

Operating Systems · Computer Science 2017-03-23 Lei Liu , Mengyao Xie , Hao Yang

3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-retry operations. Although the read-retry mechanism is…

Hardware Architecture · Computer Science 2021-03-15 Jisung Park , Myungsuk Kim , Myoungjun Chun , Lois Orosa , Jihong Kim , Onur Mutlu

Relaxed retention (or volatile) spin-transfer torque RAM (STT-RAM) has been widely studied as a way to reduce STT-RAM's write energy and latency overheads. Given a relaxed retention time STT-RAM level one (L1) cache, we analyze the impacts…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Tosiron Adegbija

Large Language Models (LLMs) have revolutionized the field of natural language processing, achieving unprecedented performance across a variety of applications. However, their increased computational and memory demands present significant…

Computation and Language · Computer Science 2025-02-28 Yuhui Xu , Zhanming Jie , Hanze Dong , Lei Wang , Xudong Lu , Aojun Zhou , Amrita Saha , Caiming Xiong , Doyen Sahoo

Variable length coding for Non-Volatile Memory (NVM) technologies is a promising method to improve memory capacity and system performance through compressing memory blocks. However, compression techniques used to improve capacity or…

Emerging Technologies · Computer Science 2017-10-26 Seyed Mohammad Seyedzadeh , Alex K. Jones , Rami Melhem

Over the last three decades, innovations in the memory subsystem were primarily targeted at overcoming the data movement bottleneck. In this paper, we focus on a specific market trend in memory technology: 3D-stacked memory and caches. We…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-17 Jens Domke , Emil Vatai , Balazs Gerofi , Yuetsu Kodama , Mohamed Wahib , Artur Podobas , Sparsh Mittal , Miquel Pericàs , Lingqi Zhang , Peng Chen , Aleksandr Drozd , Satoshi Matsuoka

Stateful tool-using LLM agents treat the context window as working memory, yet today's agent harnesses manage residency and durability as best-effort, causing recurring failures: lost state after compaction, bypassed flushes on reset, and…

Artificial Intelligence · Computer Science 2026-04-14 Mofasshara Rafique , Laurent Bindschaedler

Serving long-context LLMs is costly because attention computation grows linearly with context length. Dynamic sparse attention algorithms (DSAs) mitigate this by attending only to the key-value (KV) cache of critical tokens. However, with…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-30 Qihui Zhou , Peiqi Yin , Pengfei Zuo , James Cheng

Flash-based disk caches, for example Bcache and Flashcache, has gained tremendous popularity in industry in the last decade because of its low energy consumption, non-volatile nature and high I/O speed. But these cache systems have a worse…

Operating Systems · Computer Science 2023-11-16 Chaos Dong , Fang Wang , Jianshun Zhang

Phase change memory (PCM) has recently emerged as a promising technology to meet the fast growing demand for large capacity memory in computer systems, replacing DRAM that is impeded by physical limitations. Multi-level cell (MLC) PCM…

Hardware Architecture · Computer Science 2017-11-27 Seyed Mohammad Seyedzadeh , Alex K. Jones , Rami Melhem

To reduce the computation cost and the energy consumption in large language models (LLM), skimming-based acceleration dynamically drops unimportant tokens of the input sequence progressively along layers of the LLM while preserving the…

Cryptography and Security · Computer Science 2023-12-19 Shengyao Zhang , Mi Zhang , Xudong Pan , Min Yang

Directory-based protocols have been the de facto solution for maintaining cache coherence in shared-memory parallel systems comprising multi/many cores, where each store instruction is eagerly made globally visible by invalidating the…

Hardware Architecture · Computer Science 2012-10-09 Daofu Liu , Yunji Chen , Qi Guo , Tianshi Chen , Ling Li , Qunfeng Dong , Weiwu Hu

Recent advancements in Large Language Model (LLM) agents have enabled complex multi-turn agentic tasks requiring extensive tool calling, where conversations can span dozens of API calls with increasingly large context windows. However,…

Computation and Language · Computer Science 2026-02-03 Elias Lumer , Faheem Nizar , Akshaya Jangiti , Kevin Frank , Anmol Gulati , Mandar Phadate , Vamse Kumar Subbiah

Recently the generative Large Language Model (LLM) has achieved remarkable success in numerous applications. Notably its inference generates output tokens one-by-one, leading to many redundant computations. The widely-used KV-Cache…

Machine Learning · Computer Science 2024-12-10 Weizhuo Li , Zhigang Wang , Yu Gu , Ge Yu