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Computing with high-dimensional (HD) vectors, also referred to as $\textit{hypervectors}$, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on…

Signal Processing · Electrical Eng. & Systems 2018-04-25 Fabio Montagna , Abbas Rahimi , Simone Benatti , Davide Rossi , Luca Benini

As emerging deep neural network (DNN) models continue to grow in size, using large GPU clusters to train DNNs is becoming an essential requirement to achieving acceptable training times. In this paper, we consider the case where future…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-05-25 Seo Jin Park , Joshua Fried , Sunghyun Kim , Mohammad Alizadeh , Adam Belay

Processing-using-DRAM has been proposed for a limited set of basic operations (i.e., logic operations, addition). However, in order to enable the full adoption of processing-using-DRAM, it is necessary to provide support for more complex…

Performance optimization is the art of continuous seeking a harmonious mapping between the application domain and hardware. Recent years have witnessed a surge of deep learning (DL) applications in industry. Conventional wisdom for…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-11-27 Guoping Long , Jun Yang , Wei Lin

The rising use of deep learning and other big-data algorithms has led to an increasing demand for hardware platforms that are computationally powerful, yet energy-efficient. Due to the amount of data parallelism in these algorithms,…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-08 Biresh Kumar Joardar , Ryan Gary Kim , Janardhan Rao Doppa , Partha Pratim Pande , Diana Marculescu , Radu Marculescu

This paper presents Omni 3D - a 3D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D arbitrarily interleaves metal layers for both signal/power with FETs in 3D (i.e., nFETs and…

Emerging Technologies · Computer Science 2024-09-26 Suhyeong Choi , Carlo Gilardi , Paul Gutwin , Robert M. Radway , Tathagata Srimani , Subhasish Mitra

The "Disaggregated Server" concept has been proposed for datacenters where the same type server resources are aggregated in their respective pools, for example a compute pool, memory pool, network pool, and a storage pool. Each server is…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-03-09 Bulent Abali , Richard J. Eickemeyer , Hubertus Franke , Chung-Sheng Li , Marc A. Taubenblatt

Memory disaggregation has recently been adopted in data centers to improve resource utilization, motivated by cost and sustainability. Recent studies on large-scale HPC facilities have also highlighted memory underutilization. A promising…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-30 Jacob Wahlgren , Gabin Schieffer , Maya Gokhale , Ivy Peng

In his article "Powerlist: A Structure for Parallel Recursion" Jayadev Misra wrote: "Many data parallel algorithms - Fast Fourier Transform, Batcher's sorting schemes and prefix sum - exhibit recursive structure. We propose a data…

Computational Geometry · Computer Science 2011-09-06 Roman Gitlin

3D integration offers key advantages in improving system performance and efficiency for the End-of-Scaling era. It enables the incorporation of heterogeneous system components and disparate technologies, eliminates off-chip communication…

Emerging Technologies · Computer Science 2024-09-18 Eren Kurshan , Paul Franzon

Compared to planar (i.e., two-dimensional) NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. This allows 3D NAND flash memory to increase storage density…

Hardware Architecture · Computer Science 2018-11-13 Yixin Luo , Saugata Ghose , Yu Cai , Erich F. Haratsch , Onur Mutlu

Main memories play an important role in overall energy consumption of embedded systems. Using conventional memory technologies in future designs in nanoscale era causes a drastic increase in leakage power consumption and temperature-related…

Hardware Architecture · Computer Science 2019-12-16 Salman Onsori , Arghavan Asad , Kaamran Raahemifar , Mahmood Fathy

An effective way to improve energy efficiency is to throttle hardware resources to meet a certain performance target, specified as a QoS constraint, associated with all applications running on a multicore system. Prior art has proposed…

Hardware Architecture · Computer Science 2019-11-14 Mehrzad Nejat , Madhavan Manivannan , Miquel Pericas , Per Stenstrom

Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable…

Hardware Architecture · Computer Science 2022-09-05 Gianna Paulin , Matheus Cavalcante , Paul Scheffler , Luca Bertaccini , Yichao Zhang , Frank Gürkaynak , Luca Benini

In recommendation systems, practitioners observed that increase in the number of embedding tables and their sizes often leads to significant improvement in model performances. Given this and the business importance of these models to major…

Machine Learning · Computer Science 2020-10-26 Jie Amy Yang , Jianyu Huang , Jongsoo Park , Ping Tak Peter Tang , Andrew Tulloch

5G Radio access network disaggregation and softwarization pose challenges in terms of computational performance to the processing units. At the physical layer level, the baseband processing computational effort is typically offloaded to…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-10-18 Marco Bertuletti , Yichao Zhang , Alessandro Vanelli-Coralli , Luca Benini

Neural network (NN) accelerators with multi-chip-module (MCM) architectures enable integration of massive computation capability; however, they face challenges of computing resource underutilization and off-chip communication overheads.…

Hardware Architecture · Computer Science 2026-02-17 Zongle Huang , Hongyang Jia , Kaiwei Zou , Yongpan Liu

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

High-speed packet processing on multicore CPUs places extreme demands on memory allocators. In systems like DPDK, fixed-size memory pools back packet buffers (mbufs) to avoid costly dynamic allocation. However, even DPDK's optimized mempool…

Performance · Computer Science 2026-03-24 Junyi Yang

Hybrid main memory systems combine both performance and capacity advantages from heterogeneous memory technologies. With larger capacities, higher associativities, and finer granularities, hybrid memory systems currently exhibit significant…

Hardware Architecture · Computer Science 2024-08-27 Yiwei Li , Boyu Tian , Mingyu Gao
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