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Data Prefetching is a technique that can hide memory latency by fetching data before it is needed by a program. Prefetching relies on accurate memory access prediction, to which task machine learning based methods are increasingly applied.…

Hardware Architecture · Computer Science 2022-05-31 Pengmiao Zhang , Ajitesh Srivastava , Anant V. Nori , Rajgopal Kannan , Viktor K. Prasanna

The growing memory footprints of cloud and big data applications mean that data center CPUs can spend significant time waiting for memory. An attractive approach to improving performance in such centralized compute settings is to employ…

Hardware Architecture · Computer Science 2020-09-02 Karthik Sankaranarayanan , Chit-Kwan Lin , Gautham Chinya

Several learned policies have been proposed to replace heuristics for scheduling, caching, and other system components in modern systems. By leveraging diverse features, learning from historical trends, and predicting future behaviors, such…

Machine Learning · Computer Science 2025-10-14 Samuel Yuan , Divyanshu Saxena , Jiayi Chen , Nihal Sharma , Aditya Akella

The discrepancy between processor speed and memory system performance continues to limit the performance of many workloads. To address the issue, one effective and well studied technique is cache prefetching. Many prefetching designs have…

Hardware Architecture · Computer Science 2026-02-10 Maccoy Merrell , Lei Wang , Stavros Kalafatis , Paul V. Gratz

Modern prefetchers identify memory access patterns in order to predict future accesses. However, many applications exhibit irregular access patterns that do not manifest spatio-temporal locality in the memory address space. Such…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-14 Leeor Peled , Uri Weiser , Yoav Etsion

L1 instruction (L1-I) cache misses are a source of performance bottleneck. Sequential prefetchers are simple solutions to mitigate this problem; however, prior work has shown that these prefetchers leave considerable potentials uncovered.…

Hardware Architecture · Computer Science 2021-02-04 Ali Ansari , Fatemeh Golshan , Pejman Lotfi-Kamran , Hamid Sarbazi-Azad

Could information about future incoming packets be used to build more efficient CPU-based packet processors? Can such information be obtained accurately? This paper studies novel packet processing architectures that receive external hints…

Networking and Internet Architecture · Computer Science 2024-07-08 Hamid Ghasemirahni , Alireza Farshin , Dejan Kostic , Marco Chiesa

GPUs are broadly used in I/O-intensive big data applications. Prior works demonstrate the benefits of using GPU-side file system layer, GPUfs, to improve the GPU performance and programmability in such workloads. However, GPUfs fails to…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-14 Vasilis Dimitsas , Mark Silberstein

The conventional designs of mobile computation offloading fetch user-specific data to the cloud prior to computing, called offline prefetching. However, this approach can potentially result in excessive fetching of large volumes of data and…

Information Theory · Computer Science 2017-02-24 Seung-Woo Ko , Kaibin Huang , Seong-Lyun Kim , Hyukjin Chae

Memory latencies and bandwidth are major factors, limiting system performance and scalability. Modern CPUs aim at hiding latencies by employing large caches, out-of-order execution, or complex hardware prefetchers. However, software-based…

Databases · Computer Science 2025-06-23 Arthur Bernhardt , Sajjad Tamimi , Florian Stock , Andreas Koch , Ilia Petrov

This study investigates the use of reinforcement learning to guide a general purpose cache manager decisions. Cache managers directly impact the overall performance of computer systems. They govern decisions about which objects should be…

Machine Learning · Computer Science 2019-10-01 Sami Alabed

The memory subsystem has always been a bottleneck in performance as well as significant power contributor in memory intensive applications. Many researchers have presented multi-layered memory hierarchies as a means to design energy and…

Hardware Architecture · Computer Science 2011-11-09 Minas Dasygenis , Erik Brockmeyer , Bart Durinck , Francky Catthoor , Dimitrios Soudris , Antonios Thanailakis

Memory tiering provides a cost-effective solution to increase memory capacity, utilization, and even bandwidth. Memory tiering relies on system software for memory profiling, detection of frequently accessed pages, and page migration. Such…

Operating Systems · Computer Science 2026-04-15 Xi Wang , Jie Liu , Shuangyan Yang , Jongryool Kim , Pengfei Su , Dong Li

Recent approaches for learning policies to improve caching, target just one out of the prefetching, admission and eviction processes. In contrast, we propose an end to end pipeline to learn all three policies using machine learning. We also…

Operating Systems · Computer Science 2020-09-22 Ayush Mangal , Jitesh Jain , Keerat Kaur Guliani , Omkar Bhalerao

When a computer system schedules jobs there is typically a significant cost associated with preempting a job during execution. This cost can be from the expensive task of saving the memory's state and loading data into and out of memory. It…

Data Structures and Algorithms · Computer Science 2018-03-01 Giorgio Lucarelli , Benjamin Moseley , Nguyen Kim Thang , Abhinav Srivastav , Denis Trystram

Prefetching web pages is a well-studied solution to reduce network latency by predicting users' future actions based on their past behaviors. However, such techniques are largely unexplored on mobile platforms. Today's privacy regulations…

Software Engineering · Computer Science 2021-03-25 Yixue Zhao , Siwei Yin , Adriana Sejfia , Marcelo Schmitt Laser , Haoyu Wang , Nenad Medvidovic

Hardware prefetching is one of the latency tolerance optimization techniques that tolerate costly DRAM accesses. Though hardware prefetching is one of the fundamental mechanisms prevalent on most of the commercial machines, there is no…

Hardware Architecture · Computer Science 2019-12-12 Dishank Yadav , Chaitanya Paikara

Real-time perception requires planned resource utilization. Computational planning in real-time perception is governed by two considerations -- accuracy and latency. There exist run-time decisions (e.g. choice of input resolution) that…

Computer Vision and Pattern Recognition · Computer Science 2023-11-13 Anurag Ghosh , Vaibhav Balloli , Akshay Nambi , Aditya Singh , Tanuja Ganu

FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for programming and operating FPGAs are still complex to use,…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-19 Gabriel Rodriguez-Canal , Nick Brown , Yuri Torres , Arturo Gonzalez-Escribano

A common approach when setting up a website is to utilize third party Web hosting and content delivery networks. Without taking this trend into account, any measurement study inspecting the deployment and operation of websites can be…

Networking and Internet Architecture · Computer Science 2019-05-14 Srdjan Matic , Gareth Tyson , Gianluca Stringhini