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Developing parallel algorithms efficiently requires careful management of concurrency across diverse hardware architectures. C++ executors provide a standardized interface that simplifies the development process, allowing developers to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-22 Karame Mohammadiporshokooh , Steven R. Brandt , Hartmut Kaiser

We present TTC, an open-source parallel compiler for multidimensional tensor transpositions. In order to generate high-performance C++ code, TTC explores a number of optimizations, including software prefetching, blocking, loop-reordering,…

Mathematical Software · Computer Science 2016-03-09 Paul Springer , Jeff R. Hammond , Paolo Bientinesi

Large-scale transformer models have shown remarkable performance in language modelling tasks. However, such models feature billions of parameters, leading to difficulties in their deployment and prohibitive training costs from scratch. To…

Artificial Intelligence · Computer Science 2023-06-06 Viktoriia Chekalina , Georgii Novikov , Julia Gusak , Ivan Oseledets , Alexander Panchenko

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

Numerous complex real-world systems, such as those in biological, ecological, and social networks, exhibit higher-order interactions that are often modeled using polynomial dynamical systems or homogeneous polynomial dynamical systems…

Dynamical Systems · Mathematics 2025-03-25 Xin Mao , Anqi Dong , Ziqin He , Yidan Mei , Shenghan Mei , Can Chen

Scientific applications produce vast amounts of data, posing grand challenges in the underlying data management and analytic tasks. Progressive compression is a promising way to address this problem, as it allows for on-demand data…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-02 Yanliang Li , Wenbo Li , Qian Gong , Qing Liu , Norbert Podhorszki , Scott Klasky , Xin Liang , Jieyang Chen

In this paper, we propose the Hierarchical Document Transformer (HDT), a novel sparse Transformer architecture tailored for structured hierarchical documents. Such documents are extremely important in numerous domains, including science,…

Machine Learning · Computer Science 2024-07-12 Haoyu He , Markus Flicke , Jan Buchmann , Iryna Gurevych , Andreas Geiger

Accelerating tensor applications on spatial architectures provides high performance and energy-efficiency, but requires accurate performance models for evaluating various dataflow alternatives. Such modeling relies on the notation of tensor…

Hardware Architecture · Computer Science 2021-05-06 Liqiang Lu , Naiqing Guan , Yuyue Wang , Liancheng Jia , Zizhang Luo , Jieming Yin , Jason Cong , Yun Liang

Tabular data remain the predominant format for real-world applications. Yet, developing effective neural models for tabular data remains challenging due to heterogeneous feature types and complex interactions occurring at multiple scales.…

Artificial Intelligence · Computer Science 2025-11-10 Mohamed Bouadi , Pratinav Seth , Aditya Tanna , Vinay Kumar Sankarapu

Organizations increasingly need to collaborate by performing a computation on their combined dataset, while keeping their data hidden from each other. Certain kinds of collaboration, such as collaborative data analytics and AI, require a…

Cryptography and Security · Computer Science 2025-11-04 Yicheng Liu , Rafail Ostrovsky , Scott Shenker , Sam Kumar

This paper presents a performance study of transformer language models under different hardware configurations and accuracy requirements and derives empirical observations about these resource/accuracy trade-offs. In particular, we study…

Computation and Language · Computer Science 2024-03-08 Souvika Sarkar , Mohammad Fakhruddin Babar , Md Mahadi Hassan , Monowar Hasan , Shubhra Kanti Karmaker Santu

The High Level Trigger (HLT) of the future ALICE heavy-ion experiment has to reduce its input data rate of up to 25 GB/s to at most 1.25 GB/s for output before the data is written to permanent storage. To cope with these data rates a large…

Distributed, Parallel, and Cluster Computing · Computer Science 2009-09-29 Timm M. Steinbeck

As deep learning models nowadays are widely adopted by both cloud services and edge devices, reducing the latency of deep learning model inferences becomes crucial to provide efficient model serving. However, it is challenging to develop…

Machine Learning · Computer Science 2023-02-16 Yaoyao Ding , Cody Hao Yu , Bojian Zheng , Yizhi Liu , Yida Wang , Gennady Pekhimenko

In this work, we present a new approach to high level synthesis (HLS), where high level functions are first mapped to an architectural template, before hardware synthesis is performed. As FPGA platforms are especially suitable for…

Hardware Architecture · Computer Science 2016-06-22 Shaoyi Cheng , John Wawrzynek

Specialized hardware accelerators are becoming important for more and more applications. Thanks to specialization, they can achieve high performance and energy efficiency but their design is complex and time consuming. This problem is…

Hardware Architecture · Computer Science 2021-04-06 Stephanie Soldavini , Christian Pilato

Transformer-based LLMs achieve strong results on many language tasks; however, long inputs remain challenging because context windows are finite, and prefill latency and memory grow rapidly with prompt length. Flat token-stream processing…

Computation and Language · Computer Science 2026-05-26 Maryam Haghifam , Zifan He , Jason Cong , Yizhou Sun

High-level synthesis (HLS) has enabled the rapid development of custom hardware circuits for many software applications. However, developing high-performance hardware circuits using HLS is still a non-trivial task requiring expertise in…

Hardware Architecture · Computer Science 2025-01-17 Suhail Basalama , Jason Cong

Reducing energy consumption is a challenge that is faced on a daily basis by teams from the High-Performance Computing as well as the Embedded domain. This issue is mostly attacked from an hardware perspective, by devising architectures…

Performance · Computer Science 2015-11-30 Baptiste Delporte , Roberto Rigamonti , Alberto Dassatti

Human-Machine Teaming (HMT) is revolutionizing collaboration across domains such as defense, healthcare, and autonomous systems by integrating AI-driven decision-making, trust calibration, and adaptive teaming. This survey presents a…

This paper discusses the latest generation of the MONARC (MOdels of Networked Analysis at Regional Centers) simulation framework, as a design and modelling tool for large scale distributed systems applied to HEP experiments. A…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-06-28 Ciprian Dobre , Corina Stratan