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A new amplifier-shaper-discriminator (ASD) chip was designed and manufactured for the Micro Pixel Chamber ($\mu$-PIC). The design of this ASD IC is based on the ASD IC (TGC-ASD) for the Thin Gap Chamber in the LHC Atlas Experiment. The…
Integrated superconducting spectrometers are developing to the point that they are enabling integral field units, providing large area spectral mapping capabilities for astronomy in the sub-millimeter band. However, these integral field…
Adiabatic waveguide taper and on-chip wavelength demultiplexer are the key components of photonic integrated circuits. However, these two kinds of devices which designed by traditional semi-analytic methods or brute-force search methods…
We describe the performance of amplifiers in the 4 GHz--8 GHz range using Direct Current Superconducting Quantum Interference Devices(DC SQUIDs) in a lumped element configuration. We have used external impedance transformers to couple power…
The Phase-II Upgrade of the ATLAS Muon Detector requires new electronics for the readout of the MDT drift tubes. The first processing stage, the Amplifier-Shaper-Discriminator (ASD), determines the performance of the readout for crucial…
High sampling speed can be achieved using multiple Analog-to-Digital Converters (ADCs) based on the Time-Interleaving A/D Conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC…
We introduce a new output amplifier for fully-depleted thick p-channel CCDs based on double-gate MOSFETs. The charge amplifier is an n-type MOSFET specifically designed and operated to couple the fully-depleted CCD with high charge-transfer…
On-silicon inductors using a bulk 0.18 {\mu}m CMOS process have been designed. By shunting different metal layers in parallel, inductor values and quality factors were simulated. Selected inductors were then employed in two open-loop buck…
Dramatic advances in supercontinuum generation have been made recently using photonic crystal fibers, but it is quite challenging to obtain an octave-spanning supercontinuum on a chip, partially because of strong dispersion in…
This paper describes the design and testing results of an 8 channels preamplifier-discriminator circuit based on a resistive feedback Transimpedance Amplifier architecture and a Leading-Edge Discriminator stage for fast high-accuracy time…
At BESSY the standard 16 bit resolution of the corrector power supplies was insufficient for the continous orbit drift correction. A new sophisticated design of the analog/digital I/O board increases the resolution of the analog output up…
We measure the rectified dc currents resulting when a 3-terminal semiconductor device with gate-dependent conductance is driven with an ac gate voltage. The rectified currents exhibit surprisingly complex behaviour as the dc source-drain…
Conventional analog-to-digital converters (ADCs) clip when signals exceed their input range. Modulo (unlimited) sampling overcomes this limitation by folding the signal before digitization, but existing recovery methods are either…
We present an interdigitated capacitor trimming technique for fine-tuning the resonance frequency of superconducting microresonators and increasing the multiplexing factor. We first measure the optical response of the array with a beam…
Present semiconductor research is increasingly focusing on either higher speeds or higher linearity or both. Applications range from consumer, industrial, healthcare and military. Typically such circuits are fabricated in today's…
We present the first results from the HPSoC ASIC designed for readout of Ultra-fast Silicon Detectors. The 4-channel ASIC manufactured in 65 nm CMOS by TSMC has been optimized for 50 um thick AC-LGAD. The evaluation of the analog front end…
Superconducting qubits are a promising platform for building a larger-scale quantum processor capable of solving otherwise intractable problems. In order for the processor to reach practical viability, the gate errors need to be further…
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital…
This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…
A prototype of a very high dynamic range 32-bits Digital to Analog Converter (DAC) was designed and built for the purpose of direct auditory stimulus generation. It provides signals from less than 100 nV up to 50 Watts peak power output,…