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Caching has the potential to be of significant benefit for accessing large language models (LLMs) due to their high latencies which typically range from a small number of seconds to well over a minute. Furthermore, many LLMs charge money…

Databases · Computer Science 2025-03-25 Arun Iyengar , Ashish Kundu , Ramana Kompella , Sai Nandan Mamidi

The World Wide Web has come to be a great part of our daily life, yet user observed latency is still a problem that needs a proper means of handling. Even though earlier attempts focused on caching as the chief solution to tackling this…

Networking and Internet Architecture · Computer Science 2025-09-18 Yoseph Berhanu Alebachew , Mulugeta Libsie

Row-level lineage explains what input rows produce an output row through a data processing pipeline, having many applications like data debugging, auditing, data integration, etc. Prior work on lineage falls in two lines: eager lineage…

Databases · Computer Science 2024-12-24 Yin Lin , Cong Yan

For deployment, neural architecture search should be hardware-aware, in order to satisfy the device-specific constraints (e.g., memory usage, latency and energy consumption) and enhance the model efficiency. Existing methods on…

Machine Learning · Computer Science 2021-12-03 Hayeon Lee , Sewoong Lee , Song Chong , Sung Ju Hwang

Load-Dependent Branches (LDB) often do not exhibit regular patterns in their local or global history and thus are inherently hard to predict correctly by conventional branch predictors. We propose a software-to-hardware branch…

Hardware Architecture · Computer Science 2023-06-13 Maziar Goudarzi , Reza Azimi , Julian Humecki , Faizaan Rehman , Richard Zhang , Chirag Sethi , Tanishq Bomman , Yuqi Yang

Streaming Automatic Speech Recognition (ASR) in voice assistants can utilize prefetching to partially hide the latency of response generation. Prefetching involves passing a preliminary ASR hypothesis to downstream systems in order to…

Computation and Language · Computer Science 2023-05-24 Andreas Schwarz , Di He , Maarten Van Segbroeck , Mohammed Hethnawi , Ariya Rastrow

In this paper, we propose a practical and effective approach allowing designers to optimize multi-level cache size at the early system design phase. Our key contribution is to generalize the reuse distance analysis method and develop an…

Hardware Architecture · Computer Science 2021-09-13 Cheng-Lin Tsai , Ren-Song Tsay

Modern prefetchers identify memory access patterns in order to predict future accesses. However, many applications exhibit irregular access patterns that do not manifest spatio-temporal locality in the memory address space. Such…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-14 Leeor Peled , Uri Weiser , Yoav Etsion

As memory capacity has outstripped TLB coverage, large data applications suffer from frequent page table walks. We investigate two complementary techniques for addressing this cost: reducing the number of accesses required and reducing the…

Hardware Architecture · Computer Science 2021-09-03 Chang Hyun Park , Ilias Vougioukas , Andreas Sandberg , David Black-Schaffer

Multi-agent applications often execute complex tasks as multi-stage workflows, where each stage is an LLM call whose output becomes part of context for subsequent steps. Existing LLM serving systems largely assume homogeneous clusters with…

Machine Learning · Computer Science 2026-03-24 Kangqi Ni , Wenyue Hua , Xiaoxiang Shi , Jiang Guo , Shiyu Chang , Tianlong Chen

Lossy compression is one of the most efficient solutions to reduce storage overhead and improve I/O performance for HPC applications. However, existing parallel I/O libraries cannot fully utilize lossy compression to accelerate parallel…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-06-30 Sian Jin , Dingwen Tao , Houjun Tang , Sheng Di , Suren Byna , Zarija Lukic , Franck Cappello

LLMs are increasingly executed in edge where limited GPU memory and heterogeneous computation jointly constrain deployment which motivates model partitioning and request scheduling. In this setting, minimizing latency requires addressing…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-02 Mulei Ma , Xinyi Xu , Minrui Xu , Zihan Chen , Yang Yang , Tony Q. S. Quek

Large Language Models (LLMs) and other large foundation models have achieved noteworthy success, but their size exacerbates existing resource consumption and latency challenges. In particular, the large-scale deployment of these models is…

Machine Learning · Computer Science 2023-08-30 Banghua Zhu , Ying Sheng , Lianmin Zheng , Clark Barrett , Michael I. Jordan , Jiantao Jiao

Spin-Transfer Torque RAM (STTRAM) is a promising alternative to SRAM in on-chip caches due to several advantages. These advantages include non-volatility, low leakage, high integration density, and CMOS compatibility. Prior studies have…

Hardware Architecture · Computer Science 2020-09-25 Kyle Kuan , Tosiron Adegbija

The widespread adoption of LLMs has driven an exponential rise in their deployment, imposing substantial demands on inference clusters. These clusters must handle numerous concurrent queries for different LLM downstream tasks. To handle…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-14 Nikoleta Iliakopoulou , Jovan Stojkovic , Chloe Alverti , Tianyin Xu , Hubertus Franke , Josep Torrellas

Modern server workloads exhibit massive instruction footprints that heavily pressure the processor front-end, making L1 instruction (L1I) prefetching critical for sustaining performance. However, this paper shows that current L1I…

Hardware Architecture · Computer Science 2026-05-13 Alexandre Valentin Jamet , Georgios Vavouliotis , Marti Torrents , Dimitrios Chasapis , Marc Casas

We address LLM serving workloads where repeated requests share a common solution structure but differ in localized constraints, such as output schema, variable names, or numeric constants. Prior caching approaches typically reuse either…

Operating Systems · Computer Science 2026-04-01 Azam Nouri

Content delivery networks often employ caching to reduce transmission rates from the central server to the end users. Recently, the technique of coded caching was introduced whereby coding in the caches and coded transmission signals from…

Information Theory · Computer Science 2016-02-16 Hooshang Ghasemi , Aditya Ramamoorthy

Load balancing is critical for distributed storage to meet strict service-level objectives (SLOs). It has been shown that a fast cache can guarantee load balancing for a clustered storage system. However, when the system scales out to…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-18 Zaoxing Liu , Zhihao Bai , Zhenming Liu , Xiaozhou Li , Changhoon Kim , Vladimir Braverman , Xin Jin , Ion Stoica

Current day processors employ multi-level cache hierarchy with one or two levels of private caches and a shared last-level cache (LLC). An efficient cache replacement policy at LLC is essential for reducing the off-chip memory transfer as…

Hardware Architecture · Computer Science 2013-07-25 Bijay Paikaray