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Related papers: Design Principles for Packet Deparsers on FPGAs

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The emergence of P4, a domain specific language, coupled to PISA, a domain specific architecture, is revolutionizing the networking field. P4 allows to describe how packets are processed by a programmable data plane, spanning ASICs and…

Hardware Architecture · Computer Science 2020-04-17 Thomas Luinaud , Thibaut Stimpfling , Jeferson Santiago da Silva , Yvon Savaria , J. M. Pierre Langlois

Packet parsing is a key step in SDN-aware devices. Packet parsers in SDN networks need to be both reconfigurable and fast, to support the evolving network protocols and the increasing multi-gigabit data rates. The combination of packet…

Hardware Architecture · Computer Science 2018-03-22 Jeferson Santiago da Silva , François-Raymond Boyer , J. M. Pierre Langlois

Programmable data planes enable users to design data plane algorithms for network devices, providing extensive flexibility for network customization. Programming Protocol-Independent Packet Processors (P4) has become the most widely adopted…

Networking and Internet Architecture · Computer Science 2025-03-25 Mingyu Ma , Giang T. Nguyen

Traditionally, the data plane has been designed with fixed functions to forward packets using a small set of protocols. This closed-design paradigm has limited the capability of the switches to proprietary implementations which are…

Networking and Internet Architecture · Computer Science 2021-06-16 Elie F. Kfoury , Jorge Crichigno , Elias Bou-Harb

Field Programmable Gate Arrays (FPGAs) play a significant role in computationally intensive network processing due to their flexibility and efficiency. Particularly with the high-level abstraction of the P4 network programming model, FPGA…

Networking and Internet Architecture · Computer Science 2025-04-17 Zhaoyang Han , Andrew Briasco-Stewart , Michael Zink , Miriam Leeser

In a context of ever-growing worldwide communication traffic, cloud service providers aim at deploying scalable infrastructures to address heterogeneous needs. Part of the network infrastructure, FPGAs are tailored to guarantee low-latency…

Hardware Architecture · Computer Science 2026-01-22 Jean Bruant , Pierre-Henri Horrein , Olivier Muller , Frédéric Pétrot

Throughput and latency critical applications could often benefit of performing computations close to the client. To enable this, distributed computing paradigms such as edge computing have recently emerged. However, with the advent of…

Networking and Internet Architecture · Computer Science 2022-04-07 Csaba Györgyi , Sándor Laki , Stefan Schmid

Programmable data planes allow users to define their own data plane algorithms for network devices including appropriate data plane application programming interfaces (APIs) which may be leveraged by user-defined software-defined networking…

Networking and Internet Architecture · Computer Science 2023-01-18 Frederik Hauser , Marco Häberle , Daniel Merling , Steffen Lindner , Vladimir Gurevich , Florian Zeiger , Reinhard Frank , Michael Menth

While FPGA accelerator boards and their respective high-level design tools are maturing, there is still a lack of multi-FPGA applications, libraries, and not least, benchmarks and reference implementations towards sustained HPC usage of…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-03-01 Marius Meyer , Tobias Kenter , Christian Plessl

P4 is a high-level language for programming protocol-independent packet processors. P4 works in conjunction with SDN control protocols like OpenFlow. In its current form, OpenFlow explicitly specifies protocol headers on which it operates.…

Networking and Internet Architecture · Computer Science 2014-05-19 Pat Bosshart , Dan Daly , Martin Izzard , Nick McKeown , Jennifer Rexford , Cole Schlesinger , Dan Talayco , Amin Vahdat , George Varghese , David Walker

Today, there is a trend to incorporate more intelligence (e.g., vision capabilities) into a wide range of devices, which makes high performance a necessity for computing systems. Furthermore, for embedded systems, low power consumption…

Other Computer Science · Computer Science 2014-08-25 Zhilei Chai , Zhibin Wang , Wenmin Yang , Shuai Ding , Yuanpu Zhang

This paper describes an implementation of the well-known consensus protocol, Paxos, in the P4 programming language. P4 is a language for programming the behavior of network forwarding devices (i.e., the network data plane). Moving consensus…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-11-17 Huynh Tu Dang , Marco Canini , Fernando Pedone , Robert Soulé

FPGAs are increasingly utilized in data centers due to their capacity to exploit data parallelism in computationally intensive workloads. Furthermore, the processing of modern data center workloads requires moving vast amounts of data,…

Hardware Architecture · Computer Science 2025-07-02 Andrea Galimberti , Gabriele Montanaro , Andrea Motta , Federico Proverbio , Davide Zoni

The emergence of programmable data planes, and particularly switches supporting the P4 language, has transformed network security by enabling customized, line-rate packet processing. These switches, originally intended for flexible…

Cryptography and Security · Computer Science 2025-07-31 Gursimran Singh , H. B. Acharya , Minseok Kwon

The rapid growth of data size and accessibility in recent years has instigated a shift of philosophy in algorithm design for artificial intelligence. Instead of engineering algorithms by hand, the ability to learn composable systems…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-02-16 Griffin Lacey , Graham W. Taylor , Shawki Areibi

The growing adoption of Deep Learning (DL) applications in the Internet of Things has increased the demand for energy-efficient accelerators. Field Programmable Gate Arrays (FPGAs) offer a promising platform for such acceleration due to…

Hardware Architecture · Computer Science 2025-04-15 Chao Qian

FPGA overlays are commonly implemented as coarse-grained reconfigurable architectures with a goal to improve designers' productivity through balancing flexibility and ease of configuration of the underlying fabric. To truly facilitate full…

Hardware Architecture · Computer Science 2016-06-22 Ho-Cheung Ng , Cheng Liu , Hayden Kwok-Hay So

Programmable packet processors and P4 as a programming language for such devices have gained significant interest, because their flexibility enables rapid development of a diverse set of applications that work at line rate. However, this…

Networking and Internet Architecture · Computer Science 2018-04-05 Ali Kheradmand , Grigore Rosu

Due to the emergence of embedded applications in image and video processing, communication and cryptography, improvement of pictorial information for better human perception like deblurring, denoising in several fields such as satellite…

Hardware Architecture · Computer Science 2014-04-16 Chandrajit Pal , Avik Kotal , Asit Samanta , Amlan Chakrabarti , Ranjan Ghosh

Traditionally, switches only provide forwarding services and have no credits on computation in distributed computing frameworks. The emerging programmable switches make in-network computing (INC) possible, i.e., offloading some computation…

Networking and Internet Architecture · Computer Science 2021-07-30 Ge Chen , Gaoxiong Zeng , Li Chen
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