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Deep neural networks are widely deployed in many fields. Due to the in-situ computation (known as processing in memory) capacity of the Resistive Random Access Memory (ReRAM) crossbar, ReRAM-based accelerator shows potential in accelerating…
We report a resistance based threshold logic family useful for mimicking brain like large variable logic functions in VLSI. A universal Boolean logic cell based on an analog resistive divider and threshold logic circuit is presented. The…
Binary memristive crossbars have gained huge attention as an energy-efficient deep learning hardware accelerator. Nonetheless, they suffer from various noises due to the analog nature of the crossbars. To overcome such limitations, most…
The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability.…
The precise programming of crossbar arrays of unit-cells is crucial for obtaining high matrix-vector-multiplication (MVM) accuracy in analog in-memory computing (AIMC) cores. We propose a radically different approach based on directly…
To alleviate the high cost of hardware in mmWave systems, hybrid analog/digital precoding is typically employed. In the conventional two-stage feedback scheme, the analog beamformer is determined by beam search and feedback to maximize the…
We present a novel cryptography architecture based on memristor crossbar array, binary hypervectors, and neural network. Utilizing the stochastic and unclonable nature of memristor crossbar and error tolerance of binary hypervectors and…
A channel with continuous phase modulation and 1-bit ADC with oversampling is considered. Due to oversampling, higher-order modulations yield a higher achievable rate and this work presents a method to approach this with sophisticated…
Resistive random-access memory (ReRAM) is a promising technology for designing hardware accelerators for deep neural network (DNN) inferencing. However, stochastic noise in ReRAM crossbars can degrade the DNN inferencing accuracy. We…
This paper introduces a novel simulation tool for analyzing and training neural network models tailored for compute-in-memory hardware. The tool leverages physics-based device models to enable the design of neural network models and their…
In this paper, we investigate few memristor-based analog circuits namely the phase shift oscillator, integrator, and differentiator which have been explored numerously using the traditional lumped components. We use LTspice-IV platform for…
This work introduces a fully tunable, ultra-low power unipolar memory cell inspired by the Schmitt-trigger comparator and designed in CMOS using only nine transistors. The proposed circuit operates entirely in the current domain and…
Constrained optimization underlies crucial societal problems (for instance, stock trading and bandwidth allocation), but is often computationally hard (complexity grows exponentially with problem size). The big-data era urgently demands…
Y-Flash memristors utilize the mature technology of single polysilicon floating gate non-volatile memories (NVM). It can be operated in a two-terminal configuration similar to the other emerging memristive devices, i.e., resistive…
In recent times, Resistive RAMs (ReRAMs) have gained significant prominence due to their unique feature of supporting both non-volatile storage and logic capabilities. ReRAM is also reported to provide extremely low power consumption…
The development of memristive device technologies has reached a level of maturity to enable the design of complex and large-scale hybrid memristive-CMOS neural processing systems. These systems offer promising solutions for implementing…
The advances in the field of machine learning using neuromorphic systems have paved the pathway for extensive research on possibilities of hardware implementations of neural networks. Various memristive technologies such as oxide-based…
This paper summarizes our work on experimentally characterizing, mitigating, and recovering read disturb errors in multi-level cell (MLC) NAND flash memory, which was published in DSN 2015, and examines the work's significance and future…
Deep learning is one of the most advancing technologies in various fields. Facing the limits of the current electronics platform, optical neural networks (ONNs) based on Si programmable photonic integrated circuits (PICs) have attracted…
Recently Resistive-RAM (RRAM) crossbar has been used in the design of the accelerator of convolutional neural networks (CNNs) to solve the memory wall issue. However, the intensive multiply-accumulate computations (MACs) executed at the…