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We present MoonGen, a flexible high-speed packet generator. It can saturate 10 GbE links with minimum sized packets using only a single CPU core by running on top of the packet processing framework DPDK. Linear multi-core scaling allows for…

Networking and Internet Architecture · Computer Science 2016-04-04 Paul Emmerich , Sebastian Gallenmüller , Daniel Raumer , Florian Wohlfart , Georg Carle

At design time, modern operating systems are locked in a specific safety and isolation strategy that mixes one or more hardware/software protection mechanisms (e.g. user/kernel separation); revisiting these choices after deployment requires…

Matrix extensions have emerged as an essential feature in modern CPUs to address the surging demands of AI workloads. However, existing designs often incur substantial hardware and software design overhead. Tight coupling with the CPU…

Hardware Architecture · Computer Science 2026-04-14 Jinpeng Ye , Chongxi Wang , Wenqing Li , Bin Yuan , Shiyi Wang , Fenglu Zhang , Junyu Yue , Jianan Xie , Yunhao Ye , Haoyu Deng , Yingkun Zhou , Xin Cheng , Fuxin Zhang , Jian Wang

For several decades, the CPU has been the standard model to use in the majority of computing. While the CPU does excel in some areas, heterogeneous computing, such as reconfigurable hardware, is showing increasing potential in areas like…

Hardware Architecture · Computer Science 2021-04-21 Carl-Johannes Johnsen , Alberte Thegler , Kenneth Skovhede , Brian Vinter

As tools for designing multiple processor systems-on-chips (MPSoCs) continue to evolve to meet the demands of developers, there exist systematic gaps that must be bridged to provide a more cohesive hardware/software development environment.…

Software Engineering · Computer Science 2014-08-21 Sam Skalicky , Andrew G. Schmidt , Matthew French

The recent advancements in multicore machines highlight the need to simplify concurrent programming in order to leverage their computational power. One way to achieve this is by designing efficient concurrent data structures (e.g. stacks,…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-31 Nikolaos D. Kallimanis

With the proposition to install a large number of phasor measurement units (PMUs) in the future power grid, it is essential to provide robust communications infrastructure for phasor data across the network. We make progress in this…

Information Theory · Computer Science 2015-01-05 K. G. Nagananda , Shalinee Kishore , Rick S. Blum

Embedded system performances are bounded by power consumption. The trend is to offload greedy computations on hardware accelerators as GPU, Xeon Phi or FPGA. FPGA chips combine both flexibility of programmable chips and energy-efficiency of…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-01-16 Christophe Alias

Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits…

Quantum Physics · Physics 2025-04-28 Hezi Zhang , Keyi Yin , Anbang Wu , Hassan Shapourian , Alireza Shabani , Yufei Ding

In this paper we describe HeSP, a complete simulation framework to study a general task scheduling-partitioning problem on heterogeneous architectures, which treats recursive task partitioning and scheduling decisions on equal footing.…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-02-18 Anton Rey , Francisco D. Igual , Manuel Prieto-Matías

Modern scientific simulations and instruments generate data volumes that overwhelm memory and storage, throttling scalability. Lossy compression mitigates this by trading controlled error for reduced footprint and throughput gains, yet…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-26 Skyler Ruiter , Jiannan Tian , Fengguang Song

The increasing complexity and the short life cycles of embedded systems are pushing the current system-on-chip designs towards a rapid increasing on the number of programmable processing units, while decreasing the gate count for custom…

Hardware Architecture · Computer Science 2011-11-09 Alexandre M. Amory , Marcelo Lubaszewski , Fernando G. Moraes , Edson I. Moreno

Unlocking large-scale low-bandwidth decentralized training has the potential to utilize otherwise untapped compute resources. In centralized settings, large-scale multi-node training is primarily enabled by data and pipeline parallelism,…

Machine Learning · Computer Science 2026-04-15 Alan Aboudib , Rodrigo Lopez Portillo A. , Kalei Brady , Steffen Cruz

In this paper, we propose a new secure machine learning inference platform assisted by a small dedicated security processor, which will be easier to protect and deploy compared to today's TEEs integrated into high-performance processors.…

Cryptography and Security · Computer Science 2024-10-30 Pengzhi Huang , Thang Hoang , Yueying Li , Elaine Shi , G. Edward Suh

One of the biggest concerns in IoT is privacy and security. Encryption and authentication need big power budgets, which battery-operated IoT end-nodes do not have. Hardware accelerators designed for specific cryptographic operations provide…

Hardware Architecture · Computer Science 2020-10-01 Ömer Faruk Irmak , Arda Yurdakul

Programmable packet-processing pipelines are a core building block of modern SmartNICs and switches, yet their design requires navigating intertwined trade-offs among program feasibility, hardware cost, and system-level performance.…

Networking and Internet Architecture · Computer Science 2026-02-10 Artem Ageev , Antoine Kaufmann

Data and pipeline parallelism are key strategies for scaling neural network training across distributed devices, but their high communication cost necessitates co-located computing clusters with fast interconnects, limiting their…

Scaling data volume and diversity is critical for generalizing embodied intelligence. While synthetic data generation offers a scalable alternative to expensive physical data acquisition, existing pipelines remain fragmented and…

Message propagation is fundamental in constructing distributed systems upon sparsely connected communication networks. For providing easy message propagation primitives, the mutual-exclusive propagation (MEP) of one-bit messages is…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-03-08 Shaolin Yu , Jihong Zhu , Jiali Yang

Nowadays the number of available processing cores within computing nodes which are used in recent clustered environments, are growing up with a rapid rate. Despite this trend, the number of available network interfaces in such computing…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-07-13 Mohsen Soryani , Morteza Analoui , Ghobad Zarrinchian