Related papers: Best CNTFET Ternary Adders?

Neural processor development is reducing our reliance on remote server access to process deep learning operations in an increasingly edge-driven world. By employing in-memory processing, parallelization techniques, and algorithm-hardware…

Deep Convolutional Neural Networks (CNNs) have become state-of-the art for computer vision and other signal processing tasks due to their superior accuracy. In recent years, large efforts have been made to reduce the computational costs of…

In comparison to the conventional complementary pull-up and pull-down logic structure, the pass transistor logic (PTL) family reduces the number of transistors required to perform logic functions, thereby reducing both area and power…

Ternary quantum information processing in superconducting devices poses a promising alternative to its more popular binary counterpart through larger, more connected computational spaces and proposed advantages in quantum simulation and…

Microelectromechanical system (MEMS) based on-chip resonators offer great potential for high frequency signal processing circuits like reference oscillators and filters. This is due to their exceptional features like small size, large…

In the last decade, a 2-terminal passive circuit element called a memristor has been developed for non-volatile resistive random access memory and has more recently shown promise for neuromorphic computing. Compared to flash memory,…

This paper presents new structure and adaptation criterion for equalization of two-dimensional magnetic recording channels, as opposed to typical linear equalizer with minimum mean square error (MMSE) as adaptation criterion. To compensate…

Ferroelectric field effect transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low-power, and non-volatile memories. In this paper, we propose a memory architecture named…

Modern pre-trained transformers have rapidly advanced the state-of-the-art in machine learning, but have also grown in parameters and computational complexity, making them increasingly difficult to deploy in resource-constrained…

Tensor processing units (TPUs) are one of the most well-known machine learning (ML) accelerators utilized at large scale in data centers as well as in tiny ML applications. TPUs offer several improvements and advantages over conventional ML…

We give a complete classification of binary linear complementary dual codes of lengths up to $13$ and ternary linear complementary dual codes of lengths up to $10$.

The memristor is promising to be the basic cell of next-generation computation systems. Compared to the traditional MOSFET device, the memristor is efficient over energy and area. But one of the biggest challenges faced with researchers is…

We consider a novel algorithm, for the completion of partially observed low-rank tensors, as a generalization of matrix completion. The proposed low-rank tensor completion (TC) method builds on the conventional nuclear norm (NN)…

In this paper, we present an energy-efficient, yet high-speed approximate maximally redundant signed digit (MRSD) multiplier (called AMR-MUL) based on a parallel structure. For the reduction stage, we suggest several approximate Full-Adder…

The problem of measuring the best linear approximation of a nonlinear system by means of multilevel excitation sequences is analyzed. A comparison between different types of sequences applied at the input of Wiener systems is provided by…

Sub-terahertz (sub-THz) antenna array architectures significantly impact power usage and communications capacity in multi-user multiple-input multiple-output (MU-MIMO) systems. In this work, we compare the energy efficiency and spectral…

In this work, we experimentally demonstrate two key building blocks for realizing Binary/Ternary Neural Networks (BNNs/TNNs): (i) 130 nm CMOS based sigmoidal neurons and (ii) HfOx based multi-level (MLC) OxRAM-synaptic blocks. An optimized…

Binary addition is one of the most primitive and most commonly used applications in computer arithmetic. A large variety of algorithms and implementations have been proposed for binary addition. Huey Ling proposed a simpler form of CLA…

The data transfer between a processor and memory has become a design bottleneck in data-intensive applications. Processing-In-Memory (PIM) is a practical approach to overcome the memory wall bottleneck. The 4:2 compressor is suitable for…

Given the stringent requirements of energy efficiency for Internet-of-Things edge devices, approximate multipliers, as a basic component of many processors and accelerators, have been constantly proposed and studied for decades, especially…