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State Space Models (SSMs) are efficient alternatives to traditional sequence models, excelling at processing long sequences with lower computational complexity. Their reliance on matrix multiplications makes them ideal for compute-in-memory…

Hardware Architecture · Computer Science 2025-08-19 Yuannuo Feng , Wenyong Zhou , Yuexi Lyu , Hanjie Liu , Zhengwu Liu , Ngai Wong , Wang Kang

The demand for executing Deep Neural Networks (DNNs) with low latency and minimal power consumption at the edge has led to the development of advanced heterogeneous Systems-on-Chips (SoCs) that incorporate multiple specialized computing…

Machine Learning · Computer Science 2025-02-24 Matteo Risso , Alessio Burrello , Daniele Jahier Pagliari

The widespread integration of embedded systems across various industries has facilitated seamless connectivity among devices and bolstered computational capabilities. Despite their extensive applications, embedded systems encounter…

Cryptography and Security · Computer Science 2024-04-16 Sreenitha Kasarapu , Sathwika Bavikadi , Sai Manoj Pudukotai Dinakarrao

Convolutional Neural Networks (CNNs) are widely used in deep learning applications, e.g. visual systems, robotics etc. However, existing software solutions are not efficient. Therefore, many hardware accelerators have been proposed…

Machine Learning · Computer Science 2021-09-08 Sasindu Wijeratne , Sandaruwan Jayaweera , Mahesh Dananjaya , Ajith Pasqual

Both industry and academia have extensively investigated hardware accelerations. In this work, to address the increasing demands in computational capability and memory requirement, we propose structured weight matrices (SWM)-based…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-05-01 Caiwen Ding , Ao Ren , Geng Yuan , Xiaolong Ma , Jiayu Li , Ning Liu , Bo Yuan , Yanzhi Wang

This paper develops a multi-port S-parameter framework for the analysis and optimization of stacked intelligent metasurfaces (SIMs) with unilateral active interconnections. By modeling each unit cell as a non-reciprocal two-port network,…

Signal Processing · Electrical Eng. & Systems 2026-05-08 Andrea Abrardo , Giulio Bartoli , Alberto Toccafondi , Marco Di Renzo

The rise of data-intensive AI workloads has exacerbated the ``memory wall'' bottleneck. Digital Compute-in-Memory (DCiM) using SRAM offers a scalable solution, but its vast design space makes manual design impractical, creating a need for…

Hardware Architecture · Computer Science 2026-01-19 Yiqi Zhou , JunHao Ma , Xingyang Li , Yule Sheng , Yue Yuan , Yikai Wang , Bochang Wang , Yiheng Wu , Shan Shen , Wei Xing , Daying Sun , Li Li , Zhiqiang Xiao

In this paper, we propose a mixed-precision convolution unit architecture which supports different integer and floating point (FP) precisions. The proposed architecture is based on low-bit inner product units and realizes higher precision…

Hardware Architecture · Computer Science 2021-01-29 Hamzah Abdel-Aziz , Ali Shafiee , Jong Hoon Shin , Ardavan Pedram , Joseph H. Hassoun

It is a challenging task to deploy computationally and memory intensive State-of-the-art deep neural networks (DNNs) on embedded systems with limited hardware resources and power budgets. Recently developed techniques like Deep Compression…

Computer Vision and Pattern Recognition · Computer Science 2018-04-13 Yuechao Gao , Nianhong Liu , Sheng Zhang

FPGA overlays are commonly implemented as coarse-grained reconfigurable architectures with a goal to improve designers' productivity through balancing flexibility and ease of configuration of the underlying fabric. To truly facilitate full…

Hardware Architecture · Computer Science 2016-06-22 Ho-Cheung Ng , Cheng Liu , Hayden Kwok-Hay So

The recent surge of interest in Deep Neural Networks (DNNs) has led to increasingly complex networks that tax computational and memory resources. Many DNNs presently use 16-bit or 32-bit floating point operations. Significant performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-01-23 Zachariah Carmichael , Hamed F. Langroudi , Char Khazanov , Jeffrey Lillie , John L. Gustafson , Dhireesha Kudithipudi

Processing-in-Memory (PIM) enhances memory with computational capabilities, potentially solving energy and latency issues associated with data transfer between memory and processors. However, managing concurrent computation and data flow…

Hardware Architecture · Computer Science 2025-05-09 Ahmed Mamdouh , Haoran Geng , Michael Niemier , Xiaobo Sharon Hu , Dayane Reis

We propose a co-design approach for compute-in-memory inference for deep neural networks (DNN). We use multiplication-free function approximators based on ell_1 norm along with a co-adapted processing array and compute flow. Using the…

Hardware Architecture · Computer Science 2021-02-02 Shamma Nasrin , Diaa Badawi , Ahmet Enis Cetin , Wilfred Gomes , Amit Ranjan Trivedi

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequently compromise accuracy, and this trade-off remains…

Hardware Architecture · Computer Science 2025-09-03 Wenlun Zhang , Shimpei Ando , Yung-Chin Chen , Kentaro Yoshioka

Deep Neural Networks (DNNs) have revolutionized numerous applications, but the demand for ever more performance remains unabated. Scaling DNN computations to larger clusters is generally done by distributing tasks in batch mode using…

Machine Learning · Computer Science 2020-06-23 Tong Geng , Tianqi Wang , Ang Li , Xi Jin , Martin Herbordt

This paper describes several new improvements of modular arithmetic and how to exploit them in order to gain more efficient implementations of commonly used algorithms, especially in cryptographic applications. We further present a new…

Cryptography and Security · Computer Science 2013-10-15 Wilke Trei

Arbitrary-precision integer multiplication is the core kernel of many applications in simulation, cryptography, etc. Existing acceleration of arbitrary-precision integer multiplication includes CPUs, GPUs, FPGAs, and ASICs. Among these…

Hardware Architecture · Computer Science 2023-09-22 Zhuoping Yang , Jinming Zhuang , Jiaqi Yin , Cunxi Yu , Alex K. Jones , Peipei Zhou

Deep neural network (DNN) inference using reduced integer precision has been shown to achieve significant improvements in memory utilization and compute throughput with little or no accuracy loss compared to full-precision floating-point.…

Hardware Architecture · Computer Science 2023-04-11 Yuzong Chen , Mohamed S. Abdelfattah

This article presents design techniques proposed for efficient hardware implementation of feedforward artificial neural networks (ANNs) under parallel and time-multiplexed architectures. To reduce their design complexity, after the weights…

Hardware Architecture · Computer Science 2021-08-05 Mohammadreza Esmali Nojehdeh , Sajjad Parvin , Mustafa Altun

Transformers have become the backbone of neural network architecture for most machine learning applications. Their widespread use has resulted in multiple efforts on accelerating attention, the basic building block of transformers. This…

Hardware Architecture · Computer Science 2025-02-19 Dong Eun Kim , Tanvi Sharma , Kaushik Roy