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The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active…
This paper outlines an FPGA VLSI design methodology that was used to realize a fully functioning FPGA chip in 130nm CMOS with improved routability and memory robustness. The architectural design space exploration and synthesis capability…
We propose the use of wavelength-dependent spectroscopic absorption in the evanescent field of ultra-compact whispering gallery mode microspherical lasers as selective gas sensors and estimate few ppm detection sensitivity using a simple…
We describe a new approach for driving GeV-scale plasma accelerators with long laser pulses. We show that the temporal phase of a long, high-energy driving laser pulse can be modulated periodically by co-propagating it with low-amplitude…
In Release 14, 3GPP introduced a novel paradigm known as cellular vehicle--to--everything (C-V2X) \emph{mode-4} to specifically support vehicular communications in scenarios without network coverage. Such a scheme has been devised to…
We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion $\mu$-TPCs for directional dark matter searches. Low-noise…
Providing uplink high data rate is one of the big concerns in visible light communication (VLC) systems. This paper introduces an uplink VLC system based on an infrared transmitter with beam steering to provide high data rates. In this…
Nanoscale potential wells provide a powerful means to engineer energy landscapes in low dimensional materials, enabling control over quantum states, carrier dynamics, and optoelectronic responses. Such confinement governs phenomena…
In order to achieve the challenging requirements on the CLIC vertex detector, a range of technology options have been considered in recent years. One prominent idea is the use of active sensors implemented in a commercial high-voltage CMOS…
Lasers can exhibit nonlinear and chaotic dynamics driven by the interaction of multiple lasing modes, and investigating the different scenarios of mode competition and bifurcations of their dynamics is of great interest on a fundamental…
We demonstrate a compact two-chip terahertz-emitting vertical-external-cavity surface-emitting laser (TECSEL) source, which provides 1-THz output based on intracavity frequency conversion of dual-wavelength emission in a periodically-poled…
A line driver with configurable pre-emphasis is implemented in a 65 nm CMOS process. The driver utilizes a three-tap feed-forward equalization (FFE) architecture. The relative delays between the taps are selectable in increments of 1/16th…
Monolithic Active Pixel Sensors (MAPS) have been developed since the late 1990s employing silicon substrate with a thin epitaxial layer in which deposited charge is collected by disordered diffusion rather than by drift in an electric…
We have developed an inertially sensitive optomechanical laser by combining a Vertical-External-Cavity Surface-Emitting Laser with a monolithic fused silica resonator. By placing the external cavity mirror of the VECSEL onto the…
We measure the high intensity laser propagation throughout meter-scale, channel-guided LPAs by adjusting the length of the plasma channel on a shot-by-shot basis, showing high quality guiding of 500 TW laser pulses over 30 cm in a hydrogen…
The design and measurement results of ultra-low power, fast 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) prototypes in 65 nm CMOS technology are presented. Eight prototype ADCs were designed using two…
Plasma Wakefield Acceleration (PWFA) provides ultrahigh acceleration gradients of 10s of GeV/m, providing a novel path towards efficient, compact, TeV-scale linear colliders and high brightness free electron lasers. Critical to the success…
We introduce the fully-depleted charge-coupled device (CCD) as a particle detector. We demonstrate its low energy threshold operation, capable of detecting ionizing energy depositions in a single pixel down to 50 eVee. We present results of…
We present a novel low latency CMOS hardware accelerator for fully connected (FC) layers in deep neural networks (DNNs). The FC accelerator, FC-ACCL, is based on 128 8x8 or 16x16 processing elements (PEs) for matrix-vector multiplication,…
In Release 14, the 3rd Generation Partnership Project (3GPP) introduced Cellular Vehicle--to--Everything (C-V2X) \textit{mode-4} as a novel disruptive technology to support sidelink vehicular communications in out--of--coverage scenarios.…