Related papers: FERS-5200: a distributed Front-End Readout System …

With the rapid development of network protocol, TCP/IP has been widely applied in various OS systems because of its advantages of high-speed network transmission and standardization. Furthermore, TCP/IP has the functions of retransmission…

This paper presents the design, implementation, and performance evaluation of LUCAS, a low-power, ultra-low jitter ASIC optimized for SiPM readout in Time-of-Flight Computed Tomography (ToF-CT) applications. Leveraging a novel preamplifier…

To cope with the enhanced luminosity at the Large Hadron Collider (LHC) in 2021, the ATLAS collaboration is planning a major detector upgrade. As a part of this, the Level 1 trigger based on calorimeter data will be upgraded to exploit the…

The Transition-Edge Sensor (TES) is an extremely sensitive device which is used to measure the energy of individual X-ray photons. For astronomical spectrometry applications, SRON develops a Frequency Domain Multiplexing (FDM) read-out…

A new approach was developed for the design of front-end circuits for semiconductor radiation detectors. The readout scheme consists of a first stage made of only a few components located close to the detector, and of a remote second stage…

PARISROC is a complete read out chip, in AMS SiGe 0.35 micron technology [1], for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and it belongs to an R&D program funded by the French…

Current, state-of-the-art CCDs are close to being able to deliver all key performance figures for future strategic X-ray missions except for the required frame rates. Our Stanford group is seeking to close this technology gap through a…

The high-luminosity upgrade of the CERN LHC requires the replacement of the CMS tracking detector to cope with the increased radiation fluence while maintaining its excellent performance. An extensive R\&D program, aiming at using 3D pixel…

The first generation of Single electron Sensitive Read Out (SiSeRO) amplifiers, employed as on-chip charge detectors for charge-coupled devices (CCDs) have demonstrated excellent noise and spectral performance: a responsivity of around 800…

We introduce a frequency-multiplexed readout scheme for superconducting phase qubits. Using a quantum circuit with four phase qubits, we couple each qubit to a separate lumped-element superconducting readout resonator, with the readout…

The High-Acceptance DiElectron Spectrometer (HADES) at GSI Darmstadt consists of a 6-coil toroidal magnet centered on the beam axis and six identical detection sections located between the coils and covering polar angles between $18^\circ$…

This work is proposing and exploring the use of multichannel readout electronics, already used in quality assurance for gain uniformity studies, to measure the uniformity of the induction gap in GEM based detectors. The measurement will…

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC…

The RD51 collaboration maintains a common infrastructure at CERN for its R & D activities, including two beam telescopes for test beam campaigns. Recently, one of the beam telescopes has been equipped and commissioned with new multi-channel…

The ForwArd Search ExpeRiment (FASER) is an experiment searching for new light and weakly-interacting particles at CERN's Large Hadron Collider. FASER is composed of different sub-detectors, including silicon microstrip detectors,…

The ALICE Muon Trigger is currently yielded by a detector currently composed of 72 Bakelite single-gap Resistive Plate Chambers operated in maxi-avalanche mode, arranged in four 5.5x6.5 m2 detection planes. In order to meet the requirements…

POLARBEAR-2 is a next-generation receiver for precision measurements of the polarization of the cosmic microwave background (Cosmic Microwave Background (CMB)). Scheduled to deploy in early 2015, it will observe alongside the existing…

The upgrade of the Resistive Plate Chamber (RPC) detector, in order to increase the detector rate capability and to be able to work efficiently in high rate environment, consists in the reduction of the operating voltage along with the…

As from the run 3 of CERN LHC scheduled in 2022, the upgraded ALICE experiment will use a Common Readout Unit (CRU) at the heart of the data acquisition system. The CRU, based on the PCIe40 hardware designed for LHCb, is a common interface…

We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion $\mu$-TPCs for directional dark matter searches. Low-noise…