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Applications with irregular data structures, data-dependent control flows and fine-grained data transfers (e.g., real-world graph computations) perform poorly on cache-based systems. We propose the UpDown accelerator that supports…

We have extended the Falkon lightweight task execution framework to make loosely coupled programming on petascale systems a practical and useful programming model. This work studies and measures the performance factors involved in applying…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-11-17 Ioan Raicu , Zhao Zhang , Mike Wilde , Ian Foster , Pete Beckman , Kamil Iskra , Ben Clifford

FPGA-level emulation is a key step in pre-silicon chip design validation. However, emulating large-scale multi-core systems increasingly exceed the hardware resource capacity of a single FPGA, limiting the feasibility of full-system…

Hardware Architecture · Computer Science 2026-05-01 Alexander Kropotov , Miquel Moreto , Behzad Salami

Python has become a popular programming language because of its excellent programmability. Many modern software packages utilize Python for high-level algorithm design and depend on native libraries written in C/C++/Fortran for efficient…

Programming Languages · Computer Science 2021-07-02 Jialiang Tan , Yu Chen , Zhenming Liu , Bin Ren , Shuaiwen Leon Song , Xipeng Shen , Xu Liu

Training large language models requires extensive processing, made possible by many high-performance computing resources. This study compares multi-node and multi-GPU environments for training large language models of electrocardiograms. It…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-28 Dimitar Mileski , Nikola Petrovski , Marjan Gusev

Past research has proposed numerous hardware prefetching techniques, most of which rely on exploiting one specific type of program context information (e.g., program counter, cacheline address) to predict future memory accesses. These…

Hardware Architecture · Computer Science 2023-04-07 Rahul Bera , Konstantinos Kanellopoulos , Anant V. Nori , Taha Shahroodi , Sreenivas Subramoney , Onur Mutlu

Heterogeneous multi-core architectures combine a few "host" cores, optimized for single-thread performance, with many small energy-efficient "accelerator" cores for data-parallel processing, on a single chip. Offloading a computation to the…

Hardware Architecture · Computer Science 2025-11-11 Luca Colagrande , Luca Benini

Exascale systems, expected to emerge by the end of the next decade, will require the exploitation of billion-way parallelism at multiple hierarchical levels in order to achieve the desired sustained performance. The task of assessing future…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-09-27 Matthew Anderson , Maciej Brodowicz , Hartmut Kaiser , Thomas Sterling

The high-performance computing (HPC) landscape is undergoing rapid transformation, with an increasing emphasis on energy-efficient and heterogeneous computing environments. This comprehensive study extends our previous research on SYCL's…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-15 Manuel Costanzo , Enzo Rucci , Carlos García-Sánchez , Marcelo Naiouf , Manuel Prieto-Matías

Next generation High-Energy Physics (HEP) experiments are presented with significant computational challenges, both in terms of data volume and processing power. Using compute accelerators, such as GPUs, is one of the promising ways to…

Nowadays, clusters of multicores are becoming the norm and, although, many or-parallel Prolog systems have been developed in the past, to the best of our knowledge, none of them was specially designed to explore the combination of shared…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-08-05 João Santos , Ricardo Rocha

We propose XPipe, an efficient asynchronous pipeline model parallelism approach for multi-GPU DNN training. XPipe is designed to use multiple GPUs to concurrently and continuously train different parts of a DNN model. To improve GPU…

Machine Learning · Computer Science 2020-11-10 Lei Guan , Wotao Yin , Dongsheng Li , Xicheng Lu

General Purpose Graphics Processing Unit (GPGPU) computing plays a transformative role in deep learning and machine learning by leveraging the computational advantages of parallel processing. Through the power of Compute Unified Device…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-20 Ming Li , Ziqian Bi , Tianyang Wang , Yizhu Wen , Qian Niu , Xinyuan Song , Zekun Jiang , Junyu Liu , Benji Peng , Sen Zhang , Xuanhe Pan , Jiawei Xu , Jinlang Wang , Keyu Chen , Caitlyn Heqi Yin , Pohsun Feng , Ming Liu

Heterogeneous computing integrates diverse processing elements, such as CPUs, GPUs, and FPGAs, within a single system, aiming to leverage the strengths of each architecture to optimize performance and energy consumption. In this context,…

Performance · Computer Science 2025-11-19 Maksymilian Graczyk , Vincent Desbiolles , Stefan Roiser , Andrea Guerrieri

In the fusion community, the use of high performance computing (HPC) has been mostly dominated by heavy-duty plasma simulations, such as those based on particle-in-cell and gyrokinetic codes. However, there has been a growing interest in…

Computational Physics · Physics 2021-06-14 Diogo R. Ferreira

The utilization of large-scale neural networks on Processing-In-Memory (PIM) accelerators encounters challenges due to constrained on-chip memory capacity. To tackle this issue, current works explore model compression algorithms to reduce…

Hardware Architecture · Computer Science 2024-04-18 Chenyu Wang , Zhen Dong , Daquan Zhou , Zhenhua Zhu , Yu Wang , Jiashi Feng , Kurt Keutzer

Background and Purpose: Architectural deficiencies in EPICS lead to inefficiency in the development and application of EPICS IOCs. An unintrusive solution is replacing EPICS IOCs with more maintainable and flexible Python IOCs, only reusing…

Instrumentation and Detectors · Physics 2026-03-17 Peng-Cheng Li , Xiao-Xue Bi , Ying-Ke Huang , Dian-Shuai Zhang , Xiao-Bao Deng , Qun Zhang , Ge Lei , Gang Li , Yu Liu

The most popular heterogeneous many-core platform, the CPU+GPU combination, has received relatively little attention in operating systems research. This platform is already widely deployed: GPUs can be found, in some form, in most desktop…

Operating Systems · Computer Science 2013-05-21 Weibin Sun , Robert Ricci

Traditionally, high energy physics (HEP) experiments have relied on x86 CPUs for the majority of their significant computing needs. As the field looks ahead to the next generation of experiments such as DUNE and the High-Luminosity LHC, the…

Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu
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