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An effective way to improve energy efficiency is to throttle hardware resources to meet a certain performance target, specified as a QoS constraint, associated with all applications running on a multicore system. Prior art has proposed…

Hardware Architecture · Computer Science 2019-11-14 Mehrzad Nejat , Madhavan Manivannan , Miquel Pericas , Per Stenstrom

GPUs have become indispensable in high-performance computing, machine learning, and many other domains. Efficiently utilizing the memory subsystem on GPUs is critical for maximizing computing power through massive parallelism. Analyzing…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-28 Yanbo Zhao , Jinku Cui , Zecheng Li , Shuyin Jiao , Xu Liu , Jiajia Li

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

Hardware Architecture · Computer Science 2020-03-31 Maria A. Dávila-Guzmán , Rubén Gran Tejero , María Villarroya-Gaudó , Darío Suárez Gracia

Analyzing large-scale performance logs from GPU profilers often requires terabytes of memory and hours of runtime, even for basic summaries. These constraints prevent timely insight and hinder the integration of performance analytics into…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-27 Ankur Lahiry , Ayush Pokharel , Seth Ockerman , Amal Gueroudji , Line Pouchard , Tanzima Z. Islam

As capacity and complexity of on-chip cache memory hierarchy increases, the service cost to the critical loads from Last Level Cache (LLC), which are frequently repeated, has become a major concern. The processor may stall for a…

Hardware Architecture · Computer Science 2016-08-09 Navid Khoshavi , Xunchao Chen , Jun Wang , Ronald F. DeMara

GPU shared L1 cache is a promising architecture while still suffering from high resource contentions. We present a GPU shared L1 cache architecture with an aggregated tag array that minimizes the L1 cache contentions and takes full…

Hardware Architecture · Computer Science 2023-02-22 Xiangrong Xu , Liang Wang , Limin Xiao , Lei Liu , Xilong Xie , Meng Han , Hao Liu

Large language models have been widely adopted across different tasks, but their auto-regressive generation nature often leads to inefficient resource utilization during inference. While batching is commonly used to increase throughput,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-14 Pol G. Recasens , Ferran Agullo , Yue Zhu , Chen Wang , Eun Kyung Lee , Olivier Tardieu , Jordi Torres , Josep Ll. Berral

Large-scale GPU traces play a critical role in identifying performance bottlenecks within heterogeneous High-Performance Computing (HPC) architectures. However, the sheer volume and complexity of a single trace of data make performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-22 Ankur Lahiry , Ayush Pokharel , Banooqa Banday , Seth Ockerman , Amal Gueroudji , Mohammad Zaeed , Tanzima Z. Islam , Line Pouchard

GPUs are broadly used in I/O-intensive big data applications. Prior works demonstrate the benefits of using GPU-side file system layer, GPUfs, to improve the GPU performance and programmability in such workloads. However, GPUfs fails to…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-14 Vasilis Dimitsas , Mark Silberstein

A modern GPU aims to simultaneously execute more warps for higher Thread-Level Parallelism (TLP) and performance. When generating many memory requests, however, warps contend for limited cache space and thrash cache, which in turn severely…

Hardware Architecture · Computer Science 2018-05-22 Jie Zhang , Shuwen Gao , Nam Sung Kim , Myoungsoo Jung

Accelerators, like GPUs, have become a trend to deliver future performance desire, and sharing the same virtual memory space between CPUs and GPUs is increasingly adopted to simplify programming. However, address translation, which is the…

Hardware Architecture · Computer Science 2021-10-19 Chao Yu , Yuebin Bai , Rui Wang

Large Language Model (LLM) inference is increasingly constrained by GPU memory capacity rather than compute throughput, driven by growing model sizes and the linear growth of the key-value (KV) cache during autoregressive decoding. Existing…

Machine Learning · Computer Science 2026-02-03 Nikhil Gopal , Kostis Kaffes

Filters approximately store a set of items while trading off accuracy for space-efficiency and can address the limited memory on accelerators, such as GPUs. However, there is a lack of high-performance and feature-rich GPU filters as most…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-20 Hunter McCoy , Steven Hofmeyr , Katherine Yelick , Prashant Pandey

The memory subsystem has always been a bottleneck in performance as well as significant power contributor in memory intensive applications. Many researchers have presented multi-layered memory hierarchies as a means to design energy and…

Hardware Architecture · Computer Science 2011-11-09 Minas Dasygenis , Erik Brockmeyer , Bart Durinck , Francky Catthoor , Dimitrios Soudris , Antonios Thanailakis

High Performance Compute (HPC) clusters often produce intermediate files as part of code execution and message passing is not always possible to supply data to these cluster jobs. In these cases, I/O goes back to central distributed storage…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-07 Gabryel Mason-Williams , Dave Bond , Mark Basham

Retrieval-Augmented Generation (RAG) systems combine vector similarity search with large language models (LLMs) to deliver accurate, context-aware responses. However, co-locating the vector retriever and the LLM on shared GPU infrastructure…

Machine Learning · Computer Science 2026-01-21 Junkyum Kim , Divya Mahajan

A processor's memory hierarchy has a major impact on the performance of running code. However, computing platforms, where the actual hardware characteristics are hidden from both the end user and the tools that mediate execution, such as a…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-10 Keith Cooper , Xiaoran Xu

Serverless computing has grown rapidly for serving Large Language Model (LLM) inference due to its pay-as-you-go pricing, fine-grained GPU usage, and rapid scaling. However, our analysis reveals that current serverless can effectively serve…

Machine Learning · Computer Science 2025-05-21 Yifan Sui , Hao Wang , Hanfei Yu , Yitao Hu , Jianxun Li , Hao Wang

As the performance gap between memory and processors has increased, then it leads to the poor performance. Efficient virtual memory can overcome this problem. And the efficiency of virtual memory depends on the replacement policy used for…

Operating Systems · Computer Science 2014-02-05 S. R. Bhalgama , C. C. Kavar , S. S. Parmar

Evaluating high-dimensional integrals via deep hierarchical recurrences is a dominant cost in quantum chemistry. While CPUs manage these efficiently, GPUs suffer a critical mismatch: limited per-thread memory is quickly overwhelmed by an…

Computational Physics · Physics 2026-05-14 Yihong Zhang , Xinran Wei , Junshi Chen , Fusong Ju , Wei Hu , Jinlong Yang , Huanhuan Xia