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Programmable packet scheduling allows the deployment of scheduling algorithms into existing switches without need for hardware redesign. Scheduling algorithms are programmed by tagging packets with ranks, indicating their desired priority.…

Networking and Internet Architecture · Computer Science 2023-08-03 Albert Gran Alcoz , Balázs Vass , Gábor Rétvári , Laurent Vanbever

Machine Learning compilers like TVM allow a fast and flexible deployment on embedded CPUs. This enables the use of non-standard operators, which are common in ML compression techniques. However, it is necessary to understand the limitations…

Hardware Architecture · Computer Science 2021-02-02 Bernhard Klein , Christoph Gratl , Manfred Mücke , Holger Fröning

Large language model (LLM) inference performance is increasingly bottlenecked by the memory wall. While GPUs continue to scale raw compute throughput, they struggle to deliver scalable performance for memory bandwidth bound workloads. This…

Hardware Architecture · Computer Science 2026-02-25 Matthew Adiletta , Gu-Yeon Wei , David Brooks

Database Management Systems (DBMSs) are crucial for efficient data management and analytics, and are used in several different application domains. Due to the increasing volume of data a DBMS deals with, current processor-centric…

Hardware Architecture · Computer Science 2025-04-03 Manos Frouzakis , Juan Gómez-Luna , Geraldo F. Oliveira , Mohammad Sadrosadati , Onur Mutlu

Large foundation models have become central to modern machine learning, with performance scaling predictably with model size and data. However, training and deploying such models incur substantial computational and memory costs, motivating…

Large language models (LLMs) demand extensive memory capacity during both fine-tuning and inference. To enable memory-efficient fine-tuning, existing methods apply block-wise quantization techniques, such as NF4 and AF4, to the network…

Machine Learning · Computer Science 2025-05-13 Patrick Blumenberg , Thomas Graave , Tim Fingscheidt

As quantum processors grow, new performance benchmarks are required to capture the full quality of the devices at scale. While quantum volume is an excellent benchmark, it focuses on the highest quality subset of the device and so is unable…

Variational quantum algorithms exploit the features of superposition and entanglement to optimize a cost function efficiently by manipulating the quantum states. They are suitable for noisy intermediate-scale quantum (NISQ) computers that…

Quantum Physics · Physics 2023-08-29 Yunya Liu , Jiakun Liu , Jordan R. Raney , Pai Wang

Quantization is a widely-used compression technology to reduce the overhead of serving large language models (LLMs) on terminal devices and in cloud data centers. However, prevalent quantization methods, such as 8-bit weight-activation or…

Hardware Architecture · Computer Science 2024-10-17 Lian Liu , Haimeng Ren , Long Cheng , Zhaohui Xu , Yudong Pan , Mengdi Wang , Xiaowei Li , Yinhe Han , Ying Wang

Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

In heterogeneous networks such as today's Internet, the differentiated services architecture promises to provide QoS guarantees through scalable service differentiation. Traffic marking is an important component of this framework. In this…

Networking and Internet Architecture · Computer Science 2007-05-23 Abhimanyu Das , Deboyjoti Dutta , Ahmed Helmy

As machine learning (ML) applications become integral to modern network operations, there is an increasing demand for network programmability that enables low-latency ML inference for tasks such as Quality of Service (QoS) prediction and…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-02 Mohammad Firas Sada , John J. Graham , Mahidhar Tatineni , Dmitry Mishin , Thomas A. DeFanti , Frank Würthwein

CXL has been the emerging technology for expanding memory for both the host CPU and device accelerators with load/store interface. Extending memory coherency to the PCIe root complex makes the codesign more flexible in that you can access…

Hardware Architecture · Computer Science 2023-09-11 Yiwei Yang

The emergence of Large Language Models (LLMs) has necessitated the adoption of distributed training techniques, involving the deployment of thousands of GPUs to train a single model. Unfortunately, the efficiency of large-scale distributed…

Distributed algorithms that operate in the fail-recovery model rely on the state stored in stable memory to guarantee the irreversibility of operations even in the presence of failures. The performance of these algorithms lean heavily on…

Operating Systems · Computer Science 2020-02-19 William B. Mingardi , Gustavo M. D. Vieira

Reducing the average memory access time is crucial for improving the performance of applications running on multi-core architectures. With workload consolidation this becomes increasingly challenging due to shared resource contention.…

Hardware Architecture · Computer Science 2021-02-24 Nadja Ramhöj Holtryd , Madhavan Manivannan , Per Stenström , Miquel Pericàs

Modern commodity computing systems are composed by a number of different heterogeneous processing units, each of which has its own unique performance and energy characteristics. However, the majority of current network packet processing…

Networking and Internet Architecture · Computer Science 2022-05-02 Giannis Giakoumakis , Eva Papadogiannaki , Giorgos Vasiliadis , Sotiris Ioannidis

Low delay is an explicit requirement for applications such as cloud gaming and video conferencing. Delay-based congestion control can achieve the same throughput but significantly smaller delay than loss-based one and is thus ideal for…

Networking and Internet Architecture · Computer Science 2021-02-22 Maximilian Bachl , Joachim Fabini , Tanja Zseby

Memory latencies and bandwidth are major factors, limiting system performance and scalability. Modern CPUs aim at hiding latencies by employing large caches, out-of-order execution, or complex hardware prefetchers. However, software-based…

Databases · Computer Science 2025-06-23 Arthur Bernhardt , Sajjad Tamimi , Florian Stock , Andreas Koch , Ilia Petrov

It is by now well-known that wireless networks with file arrivals and departures are stable if one uses alpha-fair congestion control and back-pressure based scheduling and routing. In this paper, we examine whether ?alpha-fair congestion…

Networking and Internet Architecture · Computer Science 2012-09-26 Javad Ghaderi , Tianxiong Ji , R. Srikant