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Optimizing communication performance is imperative for large-scale computing because communication overheads limit the strong scalability of parallel applications. Today's network cards contain rather powerful processors optimized for data…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-10-20 Torsten Hoefler , Salvatore Di Girolamo , Konstantin Taranov , Ryan E. Grant , Ron Brightwell

In the era of post-Moore computing, network offload emerges as a solution to two challenges: the imperative for low-latency communication and the push towards hardware specialisation. Various methods have been employed to offload protocol-…

Networking and Internet Architecture · Computer Science 2024-05-28 Timo Schneider , Pengcheng Xu , Torsten Hoefler

High-performance clusters and datacenters pose increasingly demanding requirements on storage systems. If these systems do not operate at scale, applications are doomed to become I/O bound and waste compute cycles. To accelerate the data…

Networking and Internet Architecture · Computer Science 2022-06-22 Salvatore Di Girolamo , Daniele De Sensi , Konstantin Taranov , Milos Malesevic , Maciej Besta , Timo Schneider , Severin Kistler , Torsten Hoefler

Spiking Neural Networks (SNNs) offer a promising solution for energy-efficient edge intelligence; however, their hardware deployment is constrained by memory overhead, inefficient scaling operations, and limited parallelism. This work…

Hardware Architecture · Computer Science 2026-04-07 Sonu Kumar , Mukul Lokhande , Santosh Kumar Vishvakarma

The performance and efficiency of running large-scale datasets on traditional computing systems exhibit critical bottlenecks due to the existing "power wall" and "memory wall" problems. To resolve those problems, processing-in-memory (PIM)…

Hardware Architecture · Computer Science 2022-04-22 Yinglin Zhao , Jianlei Yang , Bing Li , Xingzhou Cheng , Xucheng Ye , Xueyan Wang , Xiaotao Jia , Zhaohao Wang , Youguang Zhang , Weisheng Zhao

In-network computing techniques, exemplified by NVLink SHARP (NVLS), offer a promising approach to addressing the communication bottlenecks in LLM inference by offloading collective operations such as All-Reduce to switches. However, the…

Hardware Architecture · Computer Science 2026-04-09 Aojie Jiang , Kang Zhu , Zhiheng Zhang , Zhengxu Su , Juntao Liu , Yuan Du , Li Du

Spiking Neural Networks (SNNs) are gaining interest due to their event-driven processing which potentially consumes low power/energy computations in hardware platforms, while offering unsupervised learning capability due to the…

Neural and Evolutionary Computing · Computer Science 2023-03-06 Rachmad Vidya Wicaksana Putra , Muhammad Shafique

Spiking neural networks (SNNs) communicate via discrete spikes in time rather than continuous activations. Their event-driven nature offers advantages for temporal processing and energy efficiency on resource-constrained hardware, but…

Computer Vision and Pattern Recognition · Computer Science 2025-11-18 Karol C. Jurzec , Tomasz Szydlo , Maciej Wielgosz

The allreduce operation is one of the most commonly used communication routines in distributed applications. To improve its bandwidth and to reduce network traffic, this operation can be accelerated by offloading it to network switches,…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-10-28 Daniele De Sensi , Salvatore Di Girolamo , Saleh Ashkboos , Shigang Li , Torsten Hoefler

Bit-serial Processing-In-Memory (PIM) is an attractive paradigm for accelerator architectures, for parallel workloads such as Deep Learning (DL), because of its capability to achieve massive data parallelism at a low area overhead and…

Hardware Architecture · Computer Science 2023-11-21 Aman Arora , Jian Weng , Siyuan Ma , Tony Nowatzki , Lizy K. John

Applications often communicate data that is non-contiguous in the send- or the receive-buffer, e.g., when exchanging a column of a matrix stored in row-major order. While non-contiguous transfers are well supported in HPC (e.g., MPI derived…

Accuracy and efficiency remain challenges for multi-party computation (MPC) frameworks. Spin is a GPU-accelerated MPC framework that supports multiple computation parties and a dishonest majority adversarial setup. We propose optimized…

Cryptography and Security · Computer Science 2024-02-27 Wuxuan Jiang , Xiangjun Song , Shenbai Hong , Haijun Zhang , Wenxin Liu , Bo Zhao , Wei Xu , Yi Li

Processing-in-memory (PIM) is a promising computing paradigm to tackle the "memory wall" challenge. However, PIM system-level benefits over traditional von Neumann architecture can be reduced when the memory array cannot fully store all the…

Hardware Architecture · Computer Science 2025-03-03 Peilin Chen , Xiaoxuan Yang

Despite the soaring use of convolutional neural networks (CNNs) in mobile applications, uniformly sustaining high-performance inference on mobile has been elusive due to the excessive computational demands of modern CNNs and the increasing…

Machine Learning · Computer Science 2020-08-25 Stefanos Laskaridis , Stylianos I. Venieris , Mario Almeida , Ilias Leontiadis , Nicholas D. Lane

The exponential growth of Internet of Things (IoT) applications has intensified the demand for efficient, high-throughput, and energy-efficient data processing at the edge. Conventional CPU-centric encryption methods suffer from performance…

Cryptography and Security · Computer Science 2025-06-19 Rasha Karakchi , Rye Stahle-Smith , Nishant Chinnasami , Tiffany Yu

With CPU scaling slowing down in today's data centers, more functionalities are being offloaded from the CPU to auxiliary devices. One such device is the SmartNIC, which is being increasingly adopted in data centers. In today's cloud…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-26 Yizhou Shan , Will Lin , Ryan Kosta , Arvind Krishnamurthy , Yiying Zhang

VoIP is becoming a low-priced and efficient replacement for PSTN in communication industries. With a widely growing adoption rate, SIP is an application layer signaling protocol, standardized by the IETF, for creating, modifying, and…

Networking and Internet Architecture · Computer Science 2017-09-06 Ahmadreza Montazerolghaem , Mohammad Hossein Yaghmaee , Alberto Leon-Garcia

Although modern, AI-centric datacenters heavily rely on SmartNICs, existing devices impose a hard trade-off. Commercial SmartNICs provide high bandwidth and easy software integration, but offer limited support for customization and data…

Hardware Architecture · Computer Science 2026-04-17 Benjamin Ramhorst , Maximilian Jakob Heer , Luhao Liu , Heejae Kim , Jonas Dann , Jin-Soo Kim , Gustavo Alonso

There is a growing interest in serverless compute, a cloud computing model that automates infrastructure resource-allocation and management while billing customers only for the resources they use. Workloads like stream processing benefit…

Networking and Internet Architecture · Computer Science 2019-09-27 Sean Choi , Muhammad Shahbaz , Balaji Prabhakar , Mendel Rosenblum

Spiking Neural Networks (SNN) are more closely related to brain-like computation and inspire hardware implementation. This is enabled by small networks that give high performance on standard classification problems. In literature, typical…

Neural and Evolutionary Computing · Computer Science 2016-12-08 Anmol Biswas , Sidharth Prasad , Sandip Lashkare , Udayan Ganguly
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