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In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or advanced driver assistance systems in the automotive…

Programming Languages · Computer Science 2015-02-27 Oliver Reiche , Konrad Häublein , Marc Reichenbach , Frank Hannig , Jürgen Teich , Dietmar Fey

FPGA-based heterogeneous architectures provide programmers with the ability to customize their hardware accelerators for flexible acceleration of many workloads. Nonetheless, such advantages come at the cost of sacrificing programmability.…

Hardware Architecture · Computer Science 2018-07-05 Jason Cong , Zhenman Fang , Yuchen Hao , Peng Wei , Cody Hao Yu , Chen Zhang , Peipei Zhou

In recent years, domain-specific accelerators (DSAs) have gained popularity for applications such as deep learning and autonomous driving. To facilitate DSA designs, programmers use high-level synthesis (HLS) to compile a high-level…

Machine Learning · Computer Science 2024-07-19 Zongyue Qin , Yunsheng Bai , Atefeh Sohrabizadeh , Zijian Ding , Ziniu Hu , Yizhou Sun , Jason Cong

Designing field-programmable gate array (FPGA)-based accelerators for modern artificial intelligence workloads requires navigating a large and complex hardware design space encompassing architectural parameters, dataflow strategies, and…

Hardware Architecture · Computer Science 2026-05-08 Vinamra Sharma , Xingjian Fu , Jude Haris , José Cano

CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. These architectures provide programmers with the ability to…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-24 Jason Cong , Peng Wei , Cody Hao Yu , Peng Zhang

Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by…

Programming Languages · Computer Science 2021-11-17 Rachit Nigam , Sachille Atapattu , Samuel Thomas , Zhijing Li , Theodore Bauer , Yuwei Ye , Apurva Koti , Adrian Sampson , Zhiru Zhang

The design of efficient hardware accelerators for high-throughput data-processing applications, e.g., deep neural networks, is a challenging task in computer architecture design. In this regard, High-Level Synthesis (HLS) emerges as a…

Hardware Architecture · Computer Science 2021-11-30 Lorenzo Ferretti , Andrea Cini , Georgios Zacharopoulos , Cesare Alippi , Laura Pozzi

Recent years have witnessed the growing popularity of domain-specific accelerators (DSAs), such as Google's TPUs, for accelerating various applications such as deep learning, search, autonomous driving, etc. To facilitate DSA designs,…

Machine Learning · Computer Science 2023-06-06 Yunsheng Bai , Atefeh Sohrabizadeh , Zongyue Qin , Ziniu Hu , Yizhou Sun , Jason Cong

Customized accelerators have revolutionized modern computing by delivering substantial gains in energy efficiency and performance through hardware specialization. Field-Programmable Gate Arrays (FPGAs) play a crucial role in this paradigm,…

Hardware Architecture · Computer Science 2025-09-25 Stéphane Pouget , Michael Lo , Louis-Noël Pouchet , Jason Cong

Recently, the field of deep learning has received great attention by the scientific community and it is used to provide improved solutions to many computer vision problems. Convolutional neural networks (CNNs) have been successfully used to…

Computer Vision and Pattern Recognition · Computer Science 2019-03-26 Panagiotis G. Mousouliotis , Loukas P. Petrou

Although high-level synthesis (HLS) tools have significantly improved programmer productivity over hardware description languages, developing for FPGAs remains tedious and error prone. Programmers must learn and implement a large set of…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-29 Johannes de Fine Licht , Tiziano De Matteis , Tal Ben-Nun , Andreas Kuster , Oliver Rausch , Manuel Burger , Carl-Johannes Johnsen , Torsten Hoefler

High Level Synthesis (HLS) tools, like the Intel FPGA SDK for OpenCL, improve design productivity and enable efficient design space exploration guided by simple program directives (pragmas), but may sometimes miss important optimizations…

Hardware Architecture · Computer Science 2022-01-12 Adel Ejjeh , Vikram Adve , Rob Rutenbar

In recent years, hardware accelerators based on field-programmable gate arrays (FPGAs) have been widely adopted, thanks to FPGAs' extraordinary flexibility. However, with the high flexibility comes the difficulty in design and optimization.…

Hardware Architecture · Computer Science 2022-07-19 Mang Yu , Sitao Huang , Deming Chen

Molecular dynamics (MD) simulation is one of the past decade's most important tools for enabling biology scientists and researchers to explore human health and diseases. However, due to the computation complexity of the MD algorithm, it…

Computational Physics · Physics 2016-11-15 Jason Cong , Zhenman Fang , Hassan Kianinejad , Peng Wei

High-Level Synthesis enables the rapid prototyping of hardware accelerators, by combining a high-level description of the functional behavior of a kernel with a set of micro-architecture optimizations as inputs. Such optimizations can be…

Hardware Architecture · Computer Science 2025-02-11 Stéphane Pouget , Louis-Noël Pouchet , Jason Cong

Design space exploration (DSE) is critical for developing optimized hardware architectures, especially for AI workloads such as deep neural networks (DNNs) and large language models (LLMs), which require specialized acceleration. As model…

Hardware Architecture · Computer Science 2025-08-15 Arkapravo Ghosh , Abhishek Moitra , Abhiroop Bhattacharjee , Ruokai Yin , Priyadarshini Panda

Even though high-level synthesis (HLS) tools mitigate the challenges of programming domain-specific accelerators (DSAs) by raising the abstraction level, optimizing hardware directive parameters remains a significant hurdle. Existing…

Hardware Architecture · Computer Science 2025-11-24 Hanyu Wang , Xinrui Wu , Zijian Ding , Su Zheng , Chengyue Wang , Neha Prakriya , Tony Nowatzki , Yizhou Sun , Jason Cong

We develop and commercialize autonomous machines, such as logistic robots and self-driving cars, around the globe. A critical challenge to our -- and any -- autonomous machine is accurate and efficient localization under resource…

Hardware Architecture · Computer Science 2021-04-30 Yiming Gan , Bo Yu , Boyuan Tian , Leimeng Xu , Wei Hu , Shaoshan Liu , Qiang Liu , Yanjun Zhang , Jie Tang , Yuhao Zhu

Hardware accelerators, especially those designed for tensor processing, have become ubiquitous in today's computing landscape. However, even with significant efforts in building compilers, programming these tensor accelerators remains…

Programming Languages · Computer Science 2025-11-07 Charles Hong , Sahil Bhatia , Alvin Cheung , Yakun Sophia Shao

High-level synthesis (HLS) is a design flow that leverages modern language features and flexibility, such as complex data structures, inheritance, templates, etc., to prototype hardware designs rapidly. However, exploring various design…

Hardware Architecture · Computer Science 2024-03-19 Md Rubel Ahmed , Toshiaki Koike-Akino , Kieran Parsons , Ye Wang
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