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Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

Large language models (LLMs) have recently transformed natural language processing, enabling machines to generate human-like text and engage in meaningful conversations. This development necessitates speed, efficiency, and accessibility in…

Hardware Architecture · Computer Science 2024-06-13 Christopher Wolters , Xiaoxuan Yang , Ulf Schlichtmann , Toyotaro Suzumura

The "Disaggregated Server" concept has been proposed for datacenters where the same type server resources are aggregated in their respective pools, for example a compute pool, memory pool, network pool, and a storage pool. Each server is…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-03-09 Bulent Abali , Richard J. Eickemeyer , Hubertus Franke , Chung-Sheng Li , Marc A. Taubenblatt

Public cloud serverless platforms have attracted a large user base due to their high scalability, plug-and-play deployment model, and pay-per-use billing. However, compared to virtual machines and container hosting services, modern…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-30 Changyuan Lin , Yuanzhi Ma , Mohammad Shahrad

The memory hierarchy has a high impact on the performance and power consumption in the system. Moreover, current embedded systems, included in mobile devices, are specifically designed to run multimedia applications, which are memory…

Hardware Architecture · Computer Science 2023-03-29 Josefa Díaz Álvarez , José L. Risco-Martín , J. Manuel Colmenar

This paper presents a broad, pathfinding design space exploration of memory management units (MMUs) for heterogeneous systems. We consider a variety of designs, ranging from accelerators tightly coupled with CPUs (and using their MMUs) to…

Hardware Architecture · Computer Science 2017-08-01 Yunsung Kim , Guilherme Cox , Martha A. Kim , Abhishek Bhattacharjee

The focus of this paper is to understand storage costs of emulating an atomic shared memory over an asynchronous, distributed message passing system. Previous literature has developed several shared memory emulation algorithms based on…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-05-26 Viveck R. Cadambe , Zhiying Wang , Nancy Lynch

Transformers have become central to natural language processing and large language models, but their deployment at scale faces three major challenges. First, the attention mechanism requires massive matrix multiplications and frequent…

Hardware Architecture · Computer Science 2026-01-22 Xiaoxuan Yang , Peilin Chen , Tergel Molom-Ochir , Yiran Chen

Memory ballooning is dynamic memory management technique for virtual machines (VMs). Ballooning is a part of memory reclamation technique operations used by a hypervisor to allow the physical host system to retrieve unused memory from…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-11-27 A B M Moniruzzaman

The biggest overhead for the instantiation of a virtual machine in a cloud infrastructure is the time spent in transferring the image of the virtual machine into the physical node that executes it. This overhead becomes larger for requests…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-11-23 Álvaro López García , Enol Fernández del Castillo

Vector processor architectures offer an efficient solution for accelerating data-parallel workloads (e.g., ML, AI), reducing instruction count, and enhancing processing efficiency. This is evidenced by the increasing adoption of vector…

Hardware Architecture · Computer Science 2025-04-15 Matteo Perotti , Vincenzo Maisto , Moritz Imfeld , Nils Wistoff , Alessandro Cilardo , Luca Benini

Hardware neural networks that implement synaptic weights with embedded non-volatile memory, such as spin torque memory (ST-MRAM), are a major lead for low energy artificial intelligence. In this work, we propose an approximate storage…

Emerging Technologies · Computer Science 2018-10-26 Nicolas Locatelli , Adrien F. Vincent , Damien Querlioz

PIM architectures aim to reduce data transfer costs between processors and memory by integrating processing units within memory layers. Prior PIM architectures have shown potential to improve energy efficiency and performance. However, such…

Hardware Architecture · Computer Science 2025-10-10 Parker Hao Tian , Zahra Yousefijamarani , Alaa Alameldeen

Weak memory models provide a complex, system-centric semantics for concurrent programs, while transactional memory (TM) provides a simpler, programmer-centric semantics. Both have been studied in detail, but their combined semantics is not…

Programming Languages · Computer Science 2018-04-18 Nathan Chong , Tyler Sorensen , John Wickerson

Software-based memory-erasure protocols are two-party communication protocols where a verifier instructs a computational device to erase its memory and send a proof of erasure. They aim at guaranteeing that low-cost IoT devices are free of…

Cryptography and Security · Computer Science 2025-09-15 Reynaldo Gil-Pons , Sjouke Mauw , Rolando Trujillo-Rasua

This paper summarizes our work on characterizing application memory error vulnerability to optimize datacenter cost via Heterogeneous-Reliability Memory (HRM), which was published in DSN 2014, and examines the work's significance and future…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-05-11 Yixin Luo , Sriram Govindan , Bikash Sharma , Mark Santaniello , Justin Meza , Aman Kansal , Jie Liu , Badriddine Khessib , Kushagra Vaid , Onur Mutlu

Data Access will be the next generation data abstraction layer for EPICS. Its implementation in C++ brought up a number of issues that are related to object oriented technology's impact on CPU and memory usage. What is gained by the new…

Software Engineering · Computer Science 2007-05-23 R. Lange , J. Hill

Processing-in-memory (PIM) reduces data movement by executing near memory, but our large-scale characterization on real PIM hardware shows that end-to-end performance is often limited by disjoint host and device address spaces that force…

Emerging Technologies · Computer Science 2025-11-20 I-Ting Lee , Bao-Kai Wang , Liang-Chi Chen , Wen Sheng Lim , Da-Wei Chang , Yu-Ming Chang , Chieng-Chung Ho

Serverless Computing is a virtualisation-related paradigm that promises to simplify application management and to solve the last challenges in the field: scale down and easy to use. The implied cost reduction, coupled with a simplified…

Cryptography and Security · Computer Science 2022-01-28 Eduard Marin , Diego Perino , Roberto Di Pietro

Non-volatile memory (NVM) technologies, being accessible in the same manner as DRAM, are considered indispensable for expanding main memory capacities. Intel Optane DCPMM is a long-awaited product that drastically increases main memory…

Operating Systems · Computer Science 2019-07-30 Takahiro Hirofuchi , Ryousei Takano
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