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As persistent memory (PM) technologies emerge, hybrid memory architectures combining DRAM with PM bring the potential to provide a tiered, byte-addressable main memory of unprecedented capacity. Nearly a decade after the first proposals for…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-24 Miguel Marques , Ilia Kuzmin , João Barreto , José Monteiro , Rodrigo Rodrigues

Persistent or Non Volatile Memory (PMEM or NVM) has recently become commercially available under several configurations with different purposes and goals. Despite the attention to the topic, we are not aware of a comprehensive empirical…

Databases · Computer Science 2021-12-02 Dimitrios Koutsoukos , Raghav Bhartia , Ana Klimovic , Gustavo Alonso

The emerging hybrid DRAM-NVM architecture is challenging the existing memory management mechanism in operating system. In this paper, we introduce memos, which can schedule memory resources over the entire memory hierarchy including cache,…

Operating Systems · Computer Science 2017-03-23 Lei Liu , Mengyao Xie , Hao Yang

The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit (CPU) and memory, with concomitant limitations in the actual execution speed. However, it has been recently…

Emerging Technologies · Computer Science 2014-07-03 Fabio Lorenzo Traversa , Fabrizio Bonani , Yuriy V. Pershin , Massimiliano Di Ventra

With the imminent slowing down of DRAM scaling, Phase Change Memory (PCM) is emerging as a lead alternative for main memory technology. While PCM achieves low energy due to various technology-specific advantages, PCM is significantly slower…

Hardware Architecture · Computer Science 2015-04-17 Hamza Bin Sohail , Balajee Vamanan , T. N. Vijaykumar

With the emergence of Non-Volatile Memories (NVMs) and their shortcomings such as limited endurance and high power consumption in write requests, several studies have suggested hybrid memory architecture employing both Dynamic Random Access…

Operating Systems · Computer Science 2018-05-08 Reza Salkhordeh , Hossein Asadi

Over the past two decades, the storage capacity and access bandwidth of main memory have improved tremendously, by 128x and 20x, respectively. These improvements are mainly due to the continuous technology scaling of DRAM (dynamic…

Hardware Architecture · Computer Science 2017-12-25 Kevin K. Chang

Intel Optane DC Persistent Memory (Optane PMM) is a new kind of byte-addressable memory with higher density and lower cost than DRAM. This enables the design of affordable systems that support up to 6TB of randomly accessible memory. In…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-25 Gurbinder Gill , Roshan Dathathri , Loc Hoang , Ramesh Peri , Keshav Pingali

Memory disaggregation (MD) allows for scalable and elastic data center design by separating compute (CPU) from memory. With MD, compute and memory are no longer coupled into the same server box. Instead, they are connected to each other via…

Databases · Computer Science 2022-07-08 Ruihong Wang , Jianguo Wang , Stratos Idreos , M. Tamer Özsu , Walid G. Aref

Emerging Persistent Memory technologies (also PM, Non-Volatile DIMMs, Storage Class Memory or SCM) hold tremendous promise for accelerating popular data-management applications like in-memory databases. However, programmers now need to deal…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-06-05 Ellis Giles , Kshitij Doshi , Peter Varman

Remote memory access (RMA) is an emerging high-performance programming model that uses RDMA hardware directly. Yet, accessing remote memories cannot invoke activities at the target which complicates implementation and limits performance of…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-10-20 Maciej Besta , Torsten Hoefler

Modern computing systems are embracing hybrid memory comprising of DRAM and non-volatile memory (NVM) to combine the best properties of both memory technologies, achieving low latency, high reliability, and high density. A prominent…

Hardware Architecture · Computer Science 2020-05-12 Shihao Song , Anup Das , Nagarajan Kandasamy

In this work, we aim to evaluate different Distributed Lock Management service designs with Remote Direct Memory Access (RDMA). In specific, we implement and evaluate the centralized and the RDMA-enabled lock manager designs for fast…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-07-21 Yeounoh Chung , Erfan Zamanian

Compute-in-memory (PIM) mitigates the memory wall by performing computation within memory, reducing data movement and improving energy efficiency. DRAM-based PIM is particularly attractive due to its high density, mature manufacturing…

Hardware Architecture · Computer Science 2026-05-26 Siddhartha Raman Sundara Raman , Siyuan Ma , Lizy Kurian John

DRAM-based main memories have read operations that destroy the read data, and as a result, must buffer large amounts of data on each array access to keep chip costs low. Unfortunately, system-level trends such as increased memory contention…

Hardware Architecture · Computer Science 2018-12-18 Justin Meza , Jing Li , Onur Mutlu

Coordinating concurrent access to a shared resource using mutual exclusion is a fundamental problem in computation. In this paper, we present a novel approach to mutual exclusion designed specifically for distributed systems leveraging a…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-23 Jacob Nelson-Slivon , Lewis Tseng , Roberto Palmieri

Paper presents and evaluates various mechanisms for remote access to memory in distributed systems based on two distinct HPC clusters. We are comparing solutions based on the shared storage and MPI (over Infiniband and Slingshot) to the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-03 Jan Meizner , Maciej Malawski

Conventional wisdom holds that an efficient interface between an OS running on a CPU and a high-bandwidth I/O device should use Direct Memory Access (DMA) to offload data transfer, descriptor rings for buffering and queuing, and interrupts…

Hardware Architecture · Computer Science 2025-04-25 Anastasiia Ruzhanskaia , Pengcheng Xu , David Cock , Timothy Roscoe

Non-volatile memory (NVM) technologies, being accessible in the same manner as DRAM, are considered indispensable for expanding main memory capacities. Intel Optane DCPMM is a long-awaited product that drastically increases main memory…

Operating Systems · Computer Science 2019-07-30 Takahiro Hirofuchi , Ryousei Takano

It has become increasingly difficult to understand the complex interaction between modern applications and main memory, composed of DRAM chips. Manufacturers are now selling and proposing many different types of DRAM, with each DRAM type…

Hardware Architecture · Computer Science 2019-10-21 Saugata Ghose , Tianshi Li , Nastaran Hajinazar , Damla Senol Cali , Onur Mutlu