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Related papers: CARAM: A Content-Aware Hybrid PCM/DRAM Main Memory…

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As DRAM and other transistor-based memory technologies approach their scalability limits, alternative storage solutions like Phase-Change Memory (PCM) are gaining attention for their scalability, fast access times, and zero leakage power.…

Data Structures and Algorithms · Computer Science 2025-11-11 Mahek Desai , Apoorva Rumale , Marjan Asadinia

Large-capacity Content Addressable Memory (CAM) is a key element in a wide variety of applications. The inevitable complexities of scaling MOS transistors introduce a major challenge in the realization of such systems. Convergence of…

Mesoscale and Nanoscale Physics · Physics 2015-03-17 Kamran Eshraghian , Kyoung Rok Cho , Omid Kavehei , Soon-Ku Kang , Derek Abbott , Sung-Mo Steve Kang

In-memory database query processing frequently involves substantial data transfers between the CPU and memory, leading to inefficiencies due to Von Neumann bottleneck. Processing-in-Memory (PIM) architectures offer a viable solution to…

Content-Addressable Memory (CAM) is a powerful abstraction for building memory caches, routing tables and hazard detection logic. Without a native CAM structure available on FPGA devices, their functionality must be emulated using the…

Hardware Architecture · Computer Science 2020-04-24 Thomas B. Preußer , Monica Chiosa , Alexander Weiss , Gustavo Alonso

Processing-in-cache (PiC) and Processing-in-memory (PiM) architectures, especially those utilizing bit-line computing, offer promising solutions to mitigate data movement bottlenecks within the memory hierarchy. While previous studies have…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Tosiron Adegbija , Kevin Gomez

This paper investigates hardware-based memory compression designs to increase the memory bandwidth. When lines are compressible, the hardware can store multiple lines in a single memory location, and retrieve all these lines in a single…

Hardware Architecture · Computer Science 2018-07-23 Vinson Young , Sanjay Kariyappa , Moinuddin K. Qureshi

Caching is crucial for enabling high-throughput networks for data intensive applications. Traditional caching technology relies on DRAM, as it can transfer data at a high rate. However, DRAM capacity is subject to contention by most system…

Networking and Internet Architecture · Computer Science 2023-10-12 Faruk Volkan Mutlu , Edmund Yeh

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of applications. Emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D…

Hardware Architecture · Computer Science 2024-03-19 Fei Wen , Mian Qin , Paul V. Gratz , A. L. Narasimha Reddy

Content Addressable Memories (CAMs) are considered a key-enabler for in-memory computing (IMC). IMC shows order of magnitude improvement in energy efficiency and throughput compared to traditional computing techniques. Recently, analog CAMs…

Hardware Architecture · Computer Science 2022-03-07 Jinane Bazzi , Jana Sweidan , Mohammed E. Fouda , Rouwaida Kanj , Ahmed M. Eltawil

Byte-addressable persistent memory (B-APM) presents a new opportunity to bridge the performance gap between main memory and storage. In this paper, we present the usage scenarios for this new technology, based on the capabilities of Intel's…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-12-14 Michele Weiland , Bernhard Homoelle

Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit (CPU) and memory, with concomitant limitations in the actual execution speed. However, it has been recently…

Emerging Technologies · Computer Science 2014-07-03 Fabio Lorenzo Traversa , Fabrizio Bonani , Yuriy V. Pershin , Massimiliano Di Ventra

Processing large-scale graph datasets is computationally intensive and time-consuming. Processor-centric CPU and GPU architectures, commonly used for graph applications, often face bottlenecks caused by extensive data movement between the…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-11 Marzieh Barkhordar , Alireza Tabatabaeian , Mohammad Sadrosadati , Christina Giannoula , Juan Gomez Luna , Izzat El Hajj , Onur Mutlu , Alaa R. Alameldeen

The widespread adoption of Large Language Models (LLMs) has exponentially increased the demand for efficient serving systems. With growing requests and context lengths, key-value (KV)-related operations, including attention computation and…

Hardware Architecture · Computer Science 2026-02-13 Lian Liu , Shixin Zhao , Yutian Zhou , Yintao He , Mengdi Wang , Yinhe Han , Ying Wang

Modern DRAM modules are often equipped with hardware error correction capabilities, especially for DRAM deployed in large-scale data centers, as process technology scaling has increased the susceptibility of these devices to errors. To…

Hardware Architecture · Computer Science 2017-06-29 Yixin Luo , Saugata Ghose , Tianshi Li , Sriram Govindan , Bikash Sharma , Bryan Kelly , Amirali Boroumand , Onur Mutlu

Computing-In-Memory (CIM) offers a potential solution to the memory wall issue and can achieve high energy efficiency by minimizing data movement, making it a promising architecture for edge AI devices. Lightweight models like MobileNet and…

Hardware Architecture · Computer Science 2025-08-21 Choongseok Song , Doo Seok Jeong

The rise of data-intensive applications exposed the limitations of conventional processor-centric von-Neumann architectures that struggle to meet the off-chip memory bandwidth demand. Therefore, recent innovations in computer architecture…

Hardware Architecture · Computer Science 2024-05-28 Asif Ali Khan , Hamid Farzaneh , Karl F. A. Friebel , Clément Fournier , Lorenzo Chelini , Jeronimo Castrillon

Computing-in-Memory (CIM) macros have gained popularity for deep learning acceleration due to their highly parallel computation and low power consumption. However, limited macro size and ADC precision introduce throughput and accuracy…

Hardware Architecture · Computer Science 2026-05-01 Ming-Han Lin , Tian-Sheuan Chang

The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part of the system energy consumption. Logic--In--Memory (LiM)…

Hardware Architecture · Computer Science 2023-04-14 Fabrizio Ottati , Giovanna Turvani , Marco Vacca , Guido Masera

Processing-in-memory (PIM), as a novel computing paradigm, provides significant performance benefits from the aspect of effective data movement reduction. SRAM-based PIM has been demonstrated as one of the most promising candidates due to…

Hardware Architecture · Computer Science 2023-11-01 Cenlin Duan , Jianlei Yang , Xiaolin He , Yingjie Qi , Yikun Wang , Yiou Wang , Ziyan He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weitao Pan , Weisheng Zhao