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This paper presents verification and implementation methods that have been developed for the design of the BrainScaleS-2 65nm ASICs. The 2nd generation BrainScaleS chips are mixed-signal devices with tight coupling between full-custom…

Hardware Architecture · Computer Science 2020-03-26 Andreas Grübl , Sebastian Billaudelle , Benjamin Cramer , Vitali Karasenko , Johannes Schemmel

This paper presents the concepts behind the BrainScales (BSS) accelerated analog neuromorphic computing architecture. It describes the second-generation BrainScales-2 (BSS-2) version and its most recent in-silico realization, the HICANN-X…

Neural and Evolutionary Computing · Computer Science 2020-03-27 Johannes Schemmel , Sebastian Billaudelle , Phillip Dauer , Johannes Weis

The BrainScaleS-2 SoC integrates analog neuron and synapse circuits with digital periphery, including two CPUs with SIMD extensions. Each ASIC is connected to a Node-FPGA, providing experiment control and Ethernet connectivity. This work…

Hardware Architecture · Computer Science 2025-12-04 Joscha Ilmberger , Johannes Schemmel

We present a novel software feature for the BrainScaleS-2 accelerated neuromorphic platform that facilitates the partitioned emulation of large-scale spiking neural networks. This approach is well suited for deep spiking neural networks and…

Neural and Evolutionary Computing · Computer Science 2024-11-07 Elias Arnold , Philipp Spilger , Jan V. Straub , Eric Müller , Dominik Dold , Gabriele Meoni , Johannes Schemmel

We present the BrainScaleS-2 mobile system as a compact analog inference engine based on the BrainScaleS-2 ASIC and demonstrate its capabilities at classifying a medical electrocardiogram dataset. The analog network core of the ASIC is…

As numerical simulations grow in size and complexity, they become increasingly resource-intensive in terms of time and energy. While specialized hardware accelerators often provide order-of-magnitude gains and are state of the art in other…

Neural and Evolutionary Computing · Computer Science 2024-12-04 Hartmut Schmidt , Andreas Grübl , José Montes , Eric Müller , Sebastian Schmitt , Johannes Schemmel

Analog neuromorphic hardware promises fast brain emulation on the one hand and an efficient implementation of novel, brain-inspired computing paradigms on the other. Bridging this spectrum requires flexibly configurable circuits with…

Neural and Evolutionary Computing · Computer Science 2022-09-21 Sebastian Billaudelle , Johannes Weis , Philipp Dauer , Johannes Schemmel

Since the beginning of information processing by electronic components, the nervous system has served as a metaphor for the organization of computational primitives. Brain-inspired computing today encompasses a class of approaches ranging…

We present first experimental results on the novel BrainScaleS-2 neuromorphic architecture based on an analog neuro-synaptic core and augmented by embedded microprocessors for complex plasticity and experiment control. The high acceleration…

Future developments in artificial intelligence will profit from the existence of novel, non-traditional substrates for brain-inspired computing. Neuromorphic computers aim to provide such a substrate that reproduces the brain's capabilities…

Neural and Evolutionary Computing · Computer Science 2019-10-02 Timo C. Wunderlich , Akos F. Kungl , Eric Müller , Johannes Schemmel , Mihai Petrovici

To rapidly process temporal information at a low metabolic cost, biological neurons integrate inputs as an analog sum but communicate with spikes, binary events in time. Analog neuromorphic hardware uses the same principles to emulate…

Sensory processing with neuromorphic systems is typically done by using either event-based sensors or translating input signals to spikes before presenting them to the neuromorphic processor. Here, we offer an alternative approach: direct…

Neural and Evolutionary Computing · Computer Science 2026-02-16 Yannik Stradmann , Johannes Schemmel , Mihai A. Petrovici , Laura Kriener

We present software facilitating the usage of the BrainScaleS-2 analog neuromorphic hardware system as an inference accelerator for artificial neural networks. The accelerator hardware is transparently integrated into the PyTorch machine…

Neuromorphic devices represent an attempt to mimic aspects of the brain's architecture and dynamics with the aim of replicating its hallmark functional capabilities in terms of computational power, robust learning and energy efficiency. We…

Emulating spiking neural networks on analog neuromorphic hardware offers several advantages over simulating them on conventional computers, particularly in terms of speed and energy consumption. However, this usually comes at the cost of…

Neuromorphic systems open up opportunities to enlarge the explorative space for computational research. However, it is often challenging to unite efficiency and usability. This work presents the software aspects of this endeavor for the…

BrainScaleS-2 is a mixed-signal accelerated neuromorphic system targeted for research in the fields of computational neuroscience and beyond-von-Neumann computing. To augment its flexibility, the analog neural network core is accompanied by…

Neural and Evolutionary Computing · Computer Science 2020-04-01 Eric Müller , Christian Mauch , Philipp Spilger , Oliver Julien Breitwieser , Johann Klähn , David Stöckel , Timo Wunderlich , Johannes Schemmel

This paper presents an extension of the BrainScaleS accelerated analog neuromorphic hardware model. The scalable neuromorphic architecture is extended by the support for multi-compartment models and non-linear dendrites. These features are…

Neural and Evolutionary Computing · Computer Science 2017-03-22 Johannes Schemmel , Laura Kriener , Paul Müller , Karlheinz Meier

The study of plasticity in spiking neural networks is an active area of research. However, simulations that involve complex plasticity rules, dense connectivity/high synapse counts, complex neuron morphologies, or extended simulation times…

Neural and Evolutionary Computing · Computer Science 2024-12-05 Philipp Spilger , Eric Müller , Johannes Schemmel

An analog synapse circuit based on ferroelectric-metal field-effect transistors is proposed, that offers 6-bit weight precision. The circuit is comprised of volatile least significant bits (LSBs) used solely during training, and…

Emerging Technologies · Computer Science 2020-04-03 Arman Kazemi , Ramin Rajaei , Kai Ni , Suman Datta , Michael Niemier , X. Sharon Hu
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