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Spiking neural networks (SNNs) recently gained momentum due to their low-power multiplication-free computing and the closer resemblance of biological processes in the nervous system of humans. However, SNNs require very long spike trains…

Hardware Architecture · Computer Science 2022-06-07 Daniel Gerlinghoff , Zhehui Wang , Xiaozhe Gu , Rick Siow Mong Goh , Tao Luo

GPU shared L1 cache is a promising architecture while still suffering from high resource contentions. We present a GPU shared L1 cache architecture with an aggregated tag array that minimizes the L1 cache contentions and takes full…

Hardware Architecture · Computer Science 2023-02-22 Xiangrong Xu , Liang Wang , Limin Xiao , Lei Liu , Xilong Xie , Meng Han , Hao Liu

Open-source simulation tools play a crucial role for neuromorphic application engineers and hardware architects to investigate performance bottlenecks and explore design optimizations before committing to silicon. Reconfigurable…

Emerging Technologies · Computer Science 2024-04-26 Sahil Hassan , Michael Inouye , Miguel C. Gonzalez , Ilkin Aliyev , Joshua Mack , Maisha Hafiz , Ali Akoglu

Today's graphics processing unit (GPU) applications produce vast volumes of data, which are challenging to store and transfer efficiently. Thus, data compression is becoming a critical technique to mitigate the storage burden and…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-04 Boyuan Zhang , Jiannan Tian , Sheng Di , Xiaodong Yu , Martin Swany , Dingwen Tao , Franck Cappello

Graph neural networks (GNNs) gain wide popularity. Large graphs with high-dimensional features become common and training GNNs on them is non-trivial on an ordinary machine. Given a gigantic graph, even sample-based GNN training cannot work…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-06-21 Qisheng Jiang , Lei Jia , Chundong Wang

This work presents a novel reconfigurable architecture for Low Latency Graph Neural Network (LL-GNN) designs for particle detectors, delivering unprecedented low latency performance. Incorporating FPGA-based GNNs into particle detectors…

Hardware Architecture · Computer Science 2024-01-19 Zhiqiang Que , Hongxiang Fan , Marcus Loo , He Li , Michaela Blott , Maurizio Pierini , Alexander Tapper , Wayne Luk

In the acceleration of deep neural network training, the GPU has become the mainstream platform. GPUs face substantial challenges on GNNs, such as workload imbalance and memory access irregularities, leading to underutilized hardware.…

Machine Learning · Computer Science 2024-03-20 Hongwu Peng , Xi Xie , Kaustubh Shivdikar , MD Amit Hasan , Jiahui Zhao , Shaoyi Huang , Omer Khan , David Kaeli , Caiwen Ding

Spiking Neural Networks (SNNs) are bio-plausible models that hold great potential for realizing energy-efficient implementations of sequential tasks on resource-constrained edge devices. However, commercial edge platforms based on standard…

Neural and Evolutionary Computing · Computer Science 2023-09-26 Marco Paul E. Apolinario , Adarsh Kumar Kosta , Utkarsh Saxena , Kaushik Roy

Graph convolutional networks (GCNs) are becoming increasingly popular as they can process a wide variety of data formats that prior deep neural networks cannot easily support. One key challenge in designing hardware accelerators for GCNs is…

Machine Learning · Computer Science 2023-01-25 Mingi Yoo , Jaeyong Song , Hyeyoon Lee , Jounghoo Lee , Namhyung Kim , Youngsok Kim , Jinho Lee

Zoned Namespace (ZNS) SSDs offer a new storage model that allows for high throughput and low-latency storage by eliminating device-side garbage collection. The ZNS interface exposes storage as append-only zones, thus enforcing host…

Hardware Architecture · Computer Science 2026-04-21 Teona Bagashvili , Tarikul Islam Papon , Subhadeep Sarkar , Manos Athanassoulis

Graph Neural Networks (GNNs) have superior capability in learning graph data. Full-graph GNN training generally has high accuracy, however, it suffers from large peak memory usage and encounters the Out-of-Memory problem when handling large…

Machine Learning · Computer Science 2024-06-10 Xizhi Gu , Hongzheng Li , Shihong Gao , Xinyan Zhang , Lei Chen , Yingxia Shao

Binarized Neural Networks (BNNs) significantly reduce the computation and memory demands with binarized weights and activations compared to full-precision NNs. Executing a layer in a BNN on different devices of a heterogeneous…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-13 Leonard David Bereholschi , Ching-Chi Lin , Mikail Yayla , Jian-Jia Chen

Recently, distributed GNN training frameworks, such as DistDGL and PyG, have been developed to enable training GNN models on large graphs by leveraging multiple GPUs in a distributed manner. Despite these advances, their memory requirements…

Machine Learning · Computer Science 2025-12-09 Xin Huang , Weipeng Zhuo , Minh Phu Vuong , Shiju Li , Jongryool Kim , Bradley Rees , Chul-Ho Lee

NVIDIA cuDNN is a low-level library that provides GPU kernels frequently used in deep learning. Specifically, cuDNN implements several equivalent convolution algorithms, whose performance and memory footprint may vary considerably,…

Machine Learning · Computer Science 2018-04-16 Yosuke Oyama , Tal Ben-Nun , Torsten Hoefler , Satoshi Matsuoka

The rapid growth of LLMs demands high-throughput, memory-capacity-intensive inference on resource-constrained edge devices, where single-batch decoding remains fundamentally memory-bound. Existing out-of-core GPU-based and SSD-like…

Hardware Architecture · Computer Science 2026-04-29 Mingbo Hao , Changwei Yan , Haoyu Cui , Zhihao Yan , Yizhi Ding , Zhangrui Qian , Weiwei Shan

Edge computing and IoT applications are severely constrained by limited hardware resource. This makes memory consuming DNN frameworks not applicable to edge computing. Simple algorithms such as direct convolution are finding their way in…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-17 Xianwei Cheng , Hui Zhao , Mahmut Kandemir , Saraju Mohanty , Beilei Jiang

Graph Neural Networks (GNNs) use a fully-connected layer to extract features from the nodes of a graph and aggregate these features using message passing between nodes, combining two distinct computational patterns: dense, regular…

Hardware Architecture · Computer Science 2021-03-22 Jacob R. Stevens , Dipankar Das , Sasikanth Avancha , Bharat Kaul , Anand Raghunathan

R is one of the most popular programming languages for statistics and machine learning, but the R framework is relatively slow and unable to scale to large datasets. The general approach for speeding up an implementation in R is to…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-05-22 Da Zheng , Disa Mhembere , Joshua T. Vogelstein , Carey E. Priebe , Randal Burns

Putting the DRAM on the same package with a processor enables several times higher memory bandwidth than conventional off-package DRAM. Yet, the latency of in-package DRAM is not appreciably lower than that of off-package DRAM. A promising…

Hardware Architecture · Computer Science 2017-04-11 Xiangyao Yu , Christopher J. Hughes , Nadathur Satish , Onur Mutlu , Srinivas Devadas

Convolutional Neural Networks (CNNs) are widely employed to solve various problems, e.g., image classification. Due to their compute- and data-intensive nature, CNN accelerators have been developed as ASICs or on FPGAs. Increasing…

Hardware Architecture · Computer Science 2023-06-23 Patrick Plagwitz , Frank Hannig , Jürgen Teich , Oliver Keszocze