Related papers: Best implementations of quaternary adders
We compare the implementation of a 8x8 bit multiplier with two different implementations of a 4x4 quaternary digit multiplier. Interfacing this binary multiplier with quaternary to binary decoders and binary to quaternary encoders leads to…
The MUX implementation of ternary half adders and full adders using predecessor and successor functions lead to the most efficient efficient implementation using the smallest transistor count. These designs are compared with the binary…
While many papers have proposed implementations of ternary adders and ternary multipliers, no comparisons have generally been done with the corresponding binary ones. We compare the implementations of binary and ternary adders and…
Optimization techniques for decreasing the time and area of adder circuits have been extensively studied for years mostly in binary logic system. In this paper, we provide the necessary equations required to design a full adder in…
We compare N*N quaternary digit and 2N*2N bit CNTFET multipliers in terms of Worst case delay, Chip area, Power and Power Delay Product (PDP) for N=1, N=2 and N=4. Both multipliers use Wallace reduction trees. HSpice simulations with 32-nm…
An integer adder for integers in the binary representation is one of the basic operations of any digital processor. For adding two integers of N bits each, the serial adder takes as many clock ticks. For achieving higher speeds, parallel…
We present efficient circuits for the addition of binary numbers. We assume that we are given arrival times for all input bits and optimize the delay of the circuits, i.e.\ the time when the last output bit is computed. This contains the…
In Carry Propagate Adders, carry propagation is the critical delay. For the 1-digit adders that they use, the most efficient scheme is to generate two intermediate carries: C$_{out0}$ ($C_{in}$=0) and $C_{out1}$($C_{in}$=1). Then multiplex…
In Carry Propagate Adders, carry propagation is the critical delay. The most efficient scheme is to generate Cout0 (Cin=0) and Cout1(Cin=1) and multiplex the correct output according to Cin. For any radix, the carry output is always 0/1. We…
A demonstration that e=2.718 rounded to 3 is the best radix for computation is disproved. The MOSFET-like CNTFET technology is used to compare inverters, Nand, adders, multipliers, D Flip-Flops and SRAM cells. The transistor count ratio…
Many papers have presented multi-valued circuits in various technologies as a solution to reduce or solve interconnection issues in binary circuits. This assumption is discussed. While 4-valued signaling could divide by two the number of…
This paper explores whether or not a complete ternary full adder, whose input variables can independently be '0', '1', or '2', is indispensable in the arithmetic blocks of adder, subtractor, and multiplier. Our investigations show that none…
As transistor dimensions continue to shrink, binary devices are rapidly approaching their fundamental limits in power density. In response, multi-valued systems have attracted significant attention due to their enhanced information density.…
Qutrit (or ternary) structures arise naturally in many quantum systems, particularly in certain non-abelian anyon systems. We present efficient circuits for ternary reversible and quantum arithmetics. Our main result is the derivation of…
Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. Apart from the basic addition adders also used in performing useful operations such as subtraction,…
The Dadda algorithm is a parallel structured multiplier, which is quite faster as compared to array multipliers, i.e., Booth, Braun, Baugh-Wooley, etc. However, it consumes more power and needs a larger number of gates for hardware…
The paper presents a systematic study and implementation of a reconfigurable combinatorial multi-operand adder for use in Deep Learning systems. The size of carry changes with the number of operands and hence a reliable algorithm to…
Bit addition arises virtually everywhere in digital circuits: arithmetic operations, increment/decrement operators, computing addresses and table indices, and so on. Since bit addition is such a basic task in Boolean circuit synthesis, a…
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computing. Reversibility plays an important role when energy…
We design new continuous phase modulation (CPM) formats which are based on the combination of a proper precoder with binary input and a ternary CPM. The proposed precoder constrains the signal phase evolution in order to increase the…