Related papers: Mode-locked laser timing jitter limitation in opti…

We demonstrate 14.3-attosecond timing jitter [integrated from 10 kHz to 94 MHz offset frequency] optical pulse trains from 188-MHz repetition-rate mode-locked Yb-fiber lasers. In order to minimize the timing jitter, we shorten the non-gain…

We demonstrate ultra-low timing jitter optical pulse trains from free- running, 80 MHz repetition rate, mode-locked Yb-fiber lasers. Timing jitter of various mode-locking conditions at close-to-zero intra-cavity dispersion (-0.004 to +0.002…

Analog to Digital Converters (ADCs) are a major contributor to the energy consumption on the receiver side of millimeter-wave multiple-input multiple-output (MIMO) systems with large antenna arrays. Consequently, there has been significant…

In this paper, an on-chip photonic sampled and quantized analog-to-digital converter (ADC) on thin-film lithium niobate platform is experimentally demonstrated. Using two phase modulators as a sampler and a 5$\times$5 multimode interference…

Analog-to-digital converters (ADCs) are a major contributor to the power consumption of multiple-input multiple-output (MIMO) communication systems with large number of antennas. Use of low resolution ADCs has been proposed as a means to…

Using digital standard cells and digital place-and-route (PnR) tools, we created a 20 GS/s, 8-bit analog-to-digital converter (ADC) for use in high-speed serial link applications with an ENOB of 5.6, a DNL of 0.96 LSB, and an INL of 2.39…

We propose a new signaling scheme for on-chip optical-electrical-optical artificial neural networks that utilizes orthogonal delay-division multiplexing and pilot-tone based self-homodyne detection. This scheme offers a more efficient…

Analog to digital converters (ADCs) are a major contributor to the power consumption of multiple-input multiple-output (MIMO) receivers in large bandwidth millimeter-wave systems. Prior works have considered two mitigating solutions to…

Motivated by the practical constraints arising in emerging sensor network and Internet-of-Things (IoT) applications, the zero-delay transmission of a Gaussian measurement over a real single-input multiple-output (SIMO) additive white…

The design and measurement results of ultra-low power, fast 10-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) prototypes in 65 nm CMOS technology are presented. Eight prototype ADCs were designed using two…

Low-resolution analog-to-digital converters (ADCs) have emerged as a promising technology for reducing power consumption and complexity in massive multiple-input multiple-output (MIMO) systems while maintaining satisfactory spectral and…

High resolution analog to digital converters (ADCs) are conventionally used at the receiver terminals to store an accurate digital representation of the received signal, thereby allowing for reliable decoding of transmitted messages.…

In modern communication systems, the fidelity of analog-to-digital converters (ADCs) is limited by sampling clock jitter, i.e., small random timing deviations that undermine ideal sampling. Traditional scalar models often treat jitter as…

We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS…

This paper describes several new algorithms for estimating the parameters of a periodic bandlimited signal from samples corrupted by jitter (timing noise) and additive noise. Both classical (non-random) and Bayesian formulations are…

This paper presents a differential 10-bit 2 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with a precision-improvement technique. The proposed method breaks the direct tradeoff between the capacitive…

Light's ability to perform massive linear operations parallelly has recently inspired numerous demonstrations of optics-assisted artificial neural networks (ANN). However, a clear advantage of optics over purely digital ANN in a…

A bio-inspired Neuron-ADC with reconfigurable sampling and static power reduction for biomedical applications is proposed in this work. The Neuron-ADC leverages level-crossing sampling and a bio-inspired refractory circuit to compressively…

It was recently shown by Motes, Gilchrist, Dowling & Rohde [PRL 113, 120501 (2014)] that a time-bin encoded fiber-loop architecture can implement an arbitrary passive linear optics transformation. This was shown in the case of an ideal…

With the advent of high-speed, high-precision, and low-power mixed-signal systems, there is an ever-growing demand for accurate, fast, and energy-efficient analog-to-digital (ADCs) and digital-to-analog converters (DACs). Unfortunately,…