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Reversible circuits for SR flip flop, JK flip flop, D flip flop, T flip flop, Master Slave D flip flop and Master Slave JK flip flop have been provided with three different logical approaches. All the circuits have been optimized with the…
The use of buried dopants to construct quantum-dot cellular automata is investigated as an alternative to conventional electronic devices for information transport and elementary computation. This provides a limit in terms of…
We propose a measurement-based FTQC (MB-FTQC) architecture for high-connectivity platforms such as trapped ions and neutral atoms. The key idea is to use verified logical ancillas combined with Knill's error-correcting teleportation,…
Fault-tolerant quantum computation (FTQC) is essential to implement quantum algorithms in a noise-resilient way, and thus to enjoy advantages of quantum computers even with presence of noise. In FTQC, a quantum circuit is decomposed into…
We introduce a superconducting qubit architecture that combines high-coherence qubits and tunable qubit-qubit coupling. With the ability to set the coupling to zero, we demonstrate that this architecture is protected from the frequency…
Latch-based designs have many benefits over their flip-flop based counterparts but have limited use partially because most RTL specifications are flop-centric and automatic conversion of FF to latch-based designs is challenging.…
Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing (FTQC). However, their implementation faces significant challenges due to disparity between required dense qubit connectivity and sparse…
Code switching is an established technique that facilitates a universal set of FT quantum gate operations by combining two QEC codes with complementary sets of gates, which each by themselves are easy to implement fault-tolerantly. In this…
We study a quantum computing system using microwave photons in transmission line resonators on a superconducting chip as qubits. We show that all control necessary for quantum computing can be implemented by coupling to Josephson devices on…
We demonstrate how gradient ascent pulse engineering optimal control methods can be implemented on donor electron spin qubits in Si semiconductors with an architecture complementary to the original Kane's proposal. We focus on the…
We introduce a measure for evaluating the efficiency of finite universal quantum gate sets $\mathcal{S}$, called the Quantum Circuit Overhead (QCO), and the related notion of $T$-Quantum Circuit Overhead ($T$-QCO). QCO compares the circuit…
We show how looped pipeline architectures - which use short-range shuttling of physical qubits to achieve a finite amount of non-local connectivity - can be used to efficiently implement the fault-tolerant non-Clifford gate between 2D…
The use of asynchronous design approaches to construct digital signal processing (DSP) systems is a rapidly growing research area driven by a wide range of emerging energy constrained applications such as wireless sensor network, portable…
Large-scale quantum computation requires to be performed in the fault-tolerant manner. One crucial challenge of fault-tolerant quantum computing (FTQC) is reducing the overhead of implementing logical gates. Recently work proposed…
Quantum bits (qubits) are prone to several types of errors due to uncontrolled interactions with their environment. Common strategies to correct these errors are based on architectures of qubits involving daunting hardware overheads. A…
One of the main bottlenecks in the pursuit of a large-scale--chip-based quantum computer is the large number of control signals needed to operate qubit systems. As system sizes scale up, the number of terminals required to connect to…
The use of quantum processing units (QPUs) promises speed-ups for solving computational problems, but the quantum devices currently available possess only a very limited number of qubits and suffer from considerable imperfections. One…
Quantum low-density parity-check (qLDPC) codes are a promising construction for drastically reducing the overhead of fault-tolerant quantum computing (FTQC) architectures. However, all of the known hardware implementations of these codes…
The optimal design of a fault-tolerant quantum computer involves finding an appropriate balance between the burden of large-scale integration of noisy components and the load of improving the reliability of hardware technology. This balance…
Quantum computers are expected to bring drastic acceleration to several computing tasks against classical computers. Noisy intermediate-scale quantum (NISQ) devices, which have tens to hundreds of noisy physical qubits, are gradually…