Related papers: Synchronous Counter Design Using Novel Level Sensi…
Reversible logic has received great attention in the recent years due to their ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications advanced computing, low power CMOS…
We propose a fault-tolerant quantum computer architecture for trapped-ion devices, which we call the walking cat architecture. Our blueprint includes a compiler, a detailed description of all the quantum error-correction protocols, a…
In this work, we develop a method to use Quantum- Dot Cellular Automata (QCA) for universal quantum computing. This method is based conceptually on refocusing in NMR systems. We show how an array of QCA cells can be used for isolated single…
A scalable quantum information processing architecture based on silicon metal-oxide-semiconductor technology is presented, combining quantum hardware elements from planar and 3D silicon-on-insulator technologies. This architecture is…
In this work, we present a new large-scale quantum circuit simulator. It is based on the tensor network contraction technique to represent quantum circuits. We propose a novel parallelization algorithm based on \stepslice . In this paper,…
A key challenge in realizing fault-tolerant quantum computers is circuit optimization. Focusing on the most expensive gates in fault-tolerant quantum computation (namely, the T gates), we address the problem of T-count optimization, i.e.,…
We present two new constructions for the Toffoli gate which substantially reduce resource costs in fault-tolerant quantum computing. The first contribution is a Toffoli gate requiring Clifford operations plus only four $T =…
We show how "single" quantum dots, each hosting a singlet-triplet qubit, can be placed in arrays to build a spin quantum cellular automaton. A fast ($\sim 10$ ns) deterministic coherent singlet-triplet filtering, as opposed to current…
The use of quantum processing units (QPUs) promises speed-ups for solving computational problems. Yet, current devices are limited by the number of qubits and suffer from significant imperfections, which prevents achieving quantum…
Dynamical decoupling techniques are widely used to characterize and control the environments of solid-state quantum defects, enabling solid-state quantum memories and nanoscale quantum sensors. However, resolution is often limited by the…
The scaling barriers currently faced by both quantum networking and quantum computing technologies ultimately amount to the same core challenge of distributing high-quality entanglement at scale. In this Perspective, a novel quantum…
Control modular addition is a core arithmetic function, and we must consider the computational cost for actual quantum computers to realize efficient implementation. To achieve a low computational cost in a control modular adder, we focus…
We have developed a new superconducting digital technology, Reciprocal Quantum Logic, that uses AC power carried on a transmission line, which also serves as a clock. Using simple experiments we have demonstrated zero static power…
Digital single-flux quantum (SFQ) technology promises to meet the demands of ultra low power and high speed computing needed for future exascale supercomputing platforms. However, clocking SFQ logic circuits remains a challenge due to the…
Quantum-dot Cellular Automata (QCA) may offer a viable alternative of traditional transistor-based technology at the nanoscale. When modeling a QCA circuit, the number of degrees of freedom necessary to describe the quantum mechanical state…
Noisy Intermediate-Scale Quantum Computing (NISQ) has dominated headlines in recent years, with the longer-term vision of Fault-Tolerant Quantum Computation (FTQC) offering significant potential albeit at currently intractable resource…
We simulate the implementation of a T-gate, or $\frac{\pi}{8}$-gate, for a [7,1,3] encoded logical qubit in a non-equiprobable error environment. We demonstrate that the use of certain non-fault tolerant methods in the implementation may…
This paper enumerates new architecture of low power dual-edge triggered Flip-Flop (DETFF) designed at 180nm CMOS technology. In DETFF same data throughput can be achieved with half of the clock frequency as compared to single edge triggered…
The Toffoli gate is a fundamental building block for quantum arithmetic and reversible logic, yet its efficient realization remains a major challenge in both near-term and fault-tolerant quantum architectures. Recent advances in dynamic…
Quantum computing promises an effective way to solve targeted problems that are classically intractable. Among them, quantum computers built with superconducting qubits are considered one of the most advanced technologies, but they suffer…