Related papers: High-speed KATAN Ciphers on-a-Chip
Smart Grid, an intelligent connected grid consisting of millions of smart devices, used to collect data from the grid to improve the efficiency of its operation. These smart devices communicating wirelessly are susceptible to attacks and…
Quantum computer hardware is predicted to scale over hundreds of thousands of qubits coming online in the next decade. Despite significant theoretical and experimental QEC progress, quantum computer architecture has suffered a significant…
Scaling the number of qubits while maintaining high-fidelity quantum gates remains a key challenge for quantum computing. Presently, superconducting quantum processors with >50-qubits are actively available. For such systems,…
The GPU as a digital signal processing accelerator for cloud RAN is investigated. A new design for a 5G NR low density parity check code decoder running on a GPU is presented. The algorithm is flexibly adaptable to GPU architecture to…
Setchain has been proposed to increase blockchain scalability by relaxing the strict total order requirement among transactions. Setchain organizes elements into a sequence of sets, referred to as epochs, so that elements within each epoch…
FPGA is a hardware architecture based on a matrix of programmable and configurable logic circuits thanks to which a large number of functionalities inside the device can be modified using a hardware description language. These…
Dissipative cat qubits are a promising physical platform for quantum computing, since their large noise bias can enable more hardware-efficient quantum error correction. In this work we theoretically study the long-term prospects of a…
This paper describes SatIn, a hardware accelerator for determining boolean satisfiability (SAT) -- an important problem in many domains including verification, security analysis, and planning. SatIn is based on a distributed associative…
HQC is one of the code-based finalists in the last round of the NIST post quantum cryptography standardization process. In this process, security and implementation efficiency are key metrics for the selection of the candidates. A critical…
Hardware accelerators for convolution neural networks (CNNs) enable real-time applications of artificial intelligence technology. However, most of the existing designs suffer from low hardware utilization or high area cost due to complex…
The central challenge of quantum computing is implementing high-fidelity quantum gates at scale. However, many existing approaches to qubit control suffer from a scale-performance trade-off, impeding progress towards the creation of useful…
The global semiconductor supply chain involves design and fabrication at various locations, which leads to multiple security vulnerabilities, e.g., Hardware Trojan (HT) insertion. Although most HTs target digital circuits, HTs can be…
Embedded systems are parts of our daily life and used in many fields. They can be found in smartphones or in modern cars including GPS, light/rain sensors and other electronic assistance mechanisms. These systems may handle sensitive data…
Most quantum compiling efforts rely on standard two-qubit basis gates, such as CX and iSWAP, to implement general quantum operations. However, with the advancement of quantum architecture design, more nonstandard two-qubit gates can now be…
Quantum error-correcting codes with asymptotically lower overheads than the surface code require nonlocal connectivity. Leveraging multilayer routing and long-range coupling capabilities in superconducting qubit hardware, we develop…
Transformers are ubiquitous in Natural Language Processing (NLP) tasks, but they are difficult to be deployed on hardware due to the intensive computation. To enable low-latency inference on resource-constrained hardware platforms, we…
Developed by the APE group, APENet is a new high speed, low latency, 3-dimensional interconnect architecture optimized for PC clusters running LQCD-like numerical applications. The hardware implementation is based on a single PCI-X 133MHz…
We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and describe efficient SIMD-vectorized implementations on recent…
FrodoKEM is a lattice-based post-quantum key encapsulation mechanism (KEM). It has been considered for standardization by the International Organization for Standardization (ISO) due to its robust security profile. However, its hardware…
Quantum Key Distribution (QKD) is a physical layer encryption technique that enables two distant parties to exchange secure keys with information-theoretic security. In the last two decades, QKD has transitioned from laboratory research to…