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Related papers: CHIPP: INAF pilot project for HTC, HPC and HPDA

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Test Case Prioritization (TCP) techniques aim at proposing new test case execution orders to favor the achievement of certain testing goal, such as fault detection. Current TCP research focus mainly on code-based regression testing; however…

The limitations of digital electronics in handling real-time matrix operations for emerging computational tasks - such as artificial intelligence, drug design, and medical imaging - have prompted renewed interest in analog computing.…

High-performance computing (HPC) systems are becoming increasingly water-intensive due to their reliance on water-based cooling and the energy used in power generation. However, the water footprint of HPC remains relatively…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-02 Yankai Jiang , Raghavendra Kanakagiri , Rohan Basu Roy , Devesh Tiwari

The pace of improvement in the performance of conventional computer hardware has slowed significantly during the past decade, largely as a consequence of reaching the physical limits of manufacturing processes. To offset this slowdown, new…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-16 Marc P. Armstrong

There are increasing concerns about possible malicious modifications of integrated circuits (ICs) used in critical applications. Such attacks are often referred to as hardware Trojans. While many techniques focus on hardware Trojan…

Hardware Architecture · Computer Science 2016-11-18 Tony F. Wu , Karthik Ganesan , Yunqing Alexander Hu , H. -S. Philip Wong , Simon Wong , Subhasish Mitra

We present FINJ, a high-level fault injection tool for High-Performance Computing (HPC) systems, with a focus on the management of complex experiments. FINJ provides support for custom workloads and allows generation of anomalous conditions…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-05 Alessio Netti , Zeynep Kiziltan , Ozalp Babaoglu , Alina Sirbu , Andrea Bartolini , Andrea Borghesi

Modern GPUs adopt chiplet-based designs with multiple private cache hierarchies, but current programming models (CUDA/HIP) expose a flat execution hierarchy that cannot express chiplet-level locality or synchronization. This mismatch leads…

Particle physics has an ambitious and broad global experimental programme for the coming decades. Large investments in building new facilities are already underway or under consideration. Scaling the present processing power and data…

Driven by artificial intelligence, data science, and high-resolution simulations, I/O workloads and hardware on high-performance computing (HPC) systems have become increasingly complex. This complexity can lead to large I/O overheads and…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-03 Hammad Ather , Jean Luca Bez , Chen Wang , Hank Childs , Allen D. Malony , Suren Byna

We present a roadmap for open-source chiplet-based RISC-V systems targeting high-performance computing and artificial intelligence, aiming to close the performance gap to proprietary designs. Starting with Occamy, the first open,…

Hardware Architecture · Computer Science 2025-11-20 Paul Scheffler , Thomas Benz , Tim Fischer , Lorenzo Leone , Sina Arjmandpour , Luca Benini

The IBM Neural Computer (INC) is a highly flexible, re-configurable parallel processing system that is intended as a research and development platform for emerging machine intelligence algorithms and computational neuroscience. It consists…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-26 Pritish Narayanan , Charles E. Cox , Alexis Asseman , Nicolas Antoine , Harald Huels , Winfried W. Wilcke , Ahmet S. Ozcan

What if you could piece together your own custom biometrics and AI analysis system, a bit like LEGO blocks? We aim to bring that technology to field operators in the field who require flexible, high-performance edge AI system that can be…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Joel Brogan , Matthew Yohe , David Cornett

The rapid expansion of quantum cloud services has led to long job queues due to single-tenant execution models that underutilize hardware resources. Quantum multi-programming (QMP) mitigates this by executing multiple circuits in parallel…

Quantum Physics · Physics 2025-12-25 Miguel Palma , Shuwen Kan , Wenqi Wei , Juntao Chen , Kaixun Hua , Sara Mouradian , Ying Mao

Industry adoption of chiplets has been growing as chiplets are a cost-effective option for making large, high-performance systems. Consequently, partitioning large systems into chiplets is increasingly important. In this work, we introduce…

Hardware Architecture · Computer Science 2026-03-05 Alexander Graening , Puneet Gupta , Andrew B. Kahng , Bodhisatta Pramanik , Zhiang Wang

HPC systems used for research run a wide variety of software and workflows. This software is often written or modified by users to meet the needs of their research projects, and rarely is built with security in mind. In this paper we…

As semiconductor manufacturing advances from the 3-nm process toward the sub-nanometer regime and transitions from FinFETs to gate-all-around field-effect transistors (GAAFETs), the resulting complexity and manufacturing challenges continue…

The National Science Foundation (NSF) funded National Research Platform (NRP) is a hyper-converged cluster of nationally and globally interconnected heterogeneous computing resources. The dominant computing environment of the NRP is the x86…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-10-23 J. Alex Hurt , Grant J. Scott , Derek Weitzel , Huijun Zhu

The escalating data volume and complexity resulting from the rapid expansion of artificial intelligence (AI), internet of things (IoT) and 5G/6G mobile networks is creating an urgent need for energy-efficient, scalable computing hardware.…

As research and deployment of AI grows, the computational burden to support and sustain its progress inevitably does too. To train or fine-tune state-of-the-art models in NLP, computer vision, etc., some form of AI hardware acceleration is…

Hardware Architecture · Computer Science 2024-03-01 Dan Zhao , Siddharth Samsi , Joseph McDonald , Baolin Li , David Bestor , Michael Jones , Devesh Tiwari , Vijay Gadepally

Heterogeneous Internet of Things (IoT) systems suffer from fragmentation across hardware architectures, networking stacks, and data serialization formats. Existing standards (such as MQTT, COAP, and DDS) rely on address-bound, imperative…

Networking and Internet Architecture · Computer Science 2026-05-26 Yeison David Mejia Mosquera
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