English
Related papers

Related papers: Implementing a neural network interatomic model wi…

200 papers

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest…

Hardware Architecture · Computer Science 2025-02-12 Zhiqiang Yi , Yiwen Liang , Weidong Cao

Applications with irregular data structures, data-dependent control flows and fine-grained data transfers (e.g., real-world graph computations) perform poorly on cache-based systems. We propose the UpDown accelerator that supports…

Performance modeling of parallel applications on multicore processors remains a challenge in computational co-design due to multicore processors' complex design. Multicores include complex private and shared memory hierarchies. We present a…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-26 Atanu Barai , Gopinath Chennupati , Nandakishore Santhi , Abdel-Hameed Badawy , Yehia Arafa , Stephan Eidenbenz

In recent years, augmentation of differentiable PDE solvers with neural networks has shown promising results, particularly in fluid simulations. However, most approaches rely on convolutional neural networks and custom solvers operating on…

Machine Learning · Computer Science 2025-02-27 Matthias Schulz , Gwendal Jouan , Daniel Berger , Stefan Gavranovic , Dirk Hartmann

Today's computing systems require moving data back-and-forth between computing resources (e.g., CPUs, GPUs, accelerators) and off-chip main memory so that computation can take place on the data. Unfortunately, this data movement is a major…

Hardware Architecture · Computer Science 2022-05-31 Geraldo F. Oliveira , Amirali Boroumand , Saugata Ghose , Juan Gómez-Luna , Onur Mutlu

Ensembles of Deep Neural Networks (DNNs) have achieved qualitative predictions but they are computing and memory intensive. Therefore, the demand is growing to make them answer a heavy workload of requests with available computational…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-31 Pierrick Pochelu , Serge G. Petiton , Bruno Conche

The rise of disaggregated AI GPUs has exposed a critical bottleneck in large-scale attention workloads: non-uniform memory access (NUMA). As multi-chiplet designs become the norm for scaling compute capabilities, memory latency and…

Hardware Architecture · Computer Science 2025-11-05 Mansi Choudhary , Karthik Sangaiah , Sonali Singh , Muhammad Osama , Lisa Wu Wills , Ganesh Dasika

Intel Optane DC Persistent Memory (Optane PMM) is a new kind of byte-addressable memory with higher density and lower cost than DRAM. This enables the design of affordable systems that support up to 6TB of randomly accessible memory. In…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-25 Gurbinder Gill , Roshan Dathathri , Loc Hoang , Ramesh Peri , Keshav Pingali

Machine intelligence, especially using convolutional neural networks (CNNs), has become a large area of research over the past years. Increasingly sophisticated hardware accelerators are proposed that exploit e.g. the sparsity in…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-23 Andreas Bytyn , René Ahlsdorf , Rainer Leupers , Gerd Ascheid

As vision-based robots navigate larger environments, their spatial memory grows without bound, eventually exhausting computational resources, particularly on embedded platforms (8-16GB shared memory, $<$30W) where adding hardware is not an…

Computer Vision and Pattern Recognition · Computer Science 2026-04-21 Ma. Madecheen S. Pangaliman , Steven S. Sison , Erwin P. Quilloy , Rowel Atienza

Pipeline parallelism (PP) is widely used for training large language models (LLMs), yet its scalability is often constrained by high activation memory consumption as the number of in-flight microbatches grows with the degree of PP. In this…

Machine Learning · Computer Science 2025-07-01 Xinyi Wan , Penghui Qi , Guangxing Huang , Min Lin , Jialin Li

Many modern workloads, such as neural networks, databases, and graph processing, are fundamentally memory-bound. For such workloads, the data movement between main memory and CPU cores imposes a significant overhead in terms of both latency…

Hardware Architecture · Computer Science 2022-05-06 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

In-DRAM Processing-In-Memory (DRAM-PIM) has emerged as a promising approach to accelerate memory-intensive workloads by mitigating data transfer overhead between DRAM and the host processor. Bit-serial DRAM-PIM architectures, further…

Hardware Architecture · Computer Science 2025-12-11 Siyuan Ma , Jiajun Hu , Jeeho Ryoo , Aman Arora , Lizy Kurian John

The latest trends in high-performance computing systems show an increasing demand on the use of a large scale multicore systems in a efficient way, so that high compute-intensive applications can be executed reasonably well. However, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-02-25 Juliana M. N. Silva , Cristina Boeres , Lúcia M. A. Drummond , Artur A. Pessoa

This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep Neural Networks. Techniques to do in-situ arithmetic in…

Hardware Architecture · Computer Science 2018-05-11 Charles Eckert , Xiaowei Wang , Jingcheng Wang , Arun Subramaniyan , Ravi Iyer , Dennis Sylvester , David Blaauw , Reetuparna Das

Processing-in-memory (PIM) is a promising computing paradigm to tackle the "memory wall" challenge. However, PIM system-level benefits over traditional von Neumann architecture can be reduced when the memory array cannot fully store all the…

Hardware Architecture · Computer Science 2025-03-03 Peilin Chen , Xiaoxuan Yang

Some Deep Neural Networks (DNN) have what we call lanes, or they can be reorganized as such. Lanes are paths in the network which are data-independent and typically learn different features or add resilience to the network. Given their…

Computer Vision and Pattern Recognition · Computer Science 2019-08-13 Vanderson M. do Rosario , Mauricio Breternitz , Edson Borin

Over the past decade there has been a growing interest in the development of parallel hardware systems for simulating large-scale networks of spiking neurons. Compared to other highly-parallel systems, GPU-accelerated solutions have the…

Neurons and Cognition · Quantitative Biology 2021-02-22 Bruno Golosio , Gianmarco Tiddia , Chiara De Luca , Elena Pastorelli , Francesco Simula , Pier Stanislao Paolucci

Modern Machine Learning (ML) training on large-scale datasets is a very time-consuming workload. It relies on the optimization algorithm Stochastic Gradient Descent (SGD) due to its effectiveness, simplicity, and generalization performance.…

Hardware Architecture · Computer Science 2024-09-30 Steve Rhyner , Haocong Luo , Juan Gómez-Luna , Mohammad Sadrosadati , Jiawei Jiang , Ataberk Olgun , Harshita Gupta , Ce Zhang , Onur Mutlu

Data-intensive workloads and applications, such as machine learning (ML), are fundamentally limited by traditional computing systems based on the von-Neumann architecture. As data movement operations and energy consumption become key…

Hardware Architecture · Computer Science 2021-12-24 Mehdi Hassanpour , Marc Riera , Antonio González
‹ Prev 1 8 9 10 Next ›