Related papers: Impact of Sampler Offset on Jitter Transfer in Clo…

This brief, aimed at practitioners, offers an analysis of the effect of sampling-time jitter, i. e., the error produced by execution-time inaccuracies. We propose reinterpreting jitter-afflicted linear time-invariant systems through…

It is well known that timing jitter can degrade the bit error rate (BER) of receivers that recover the clock from input data. However, timing jitter can also result in an indefinite increase in the settling time of clock recovery circuits,…

This article explains phase noise, jitter, and some slower phenomena in digital integrated circuits, focusing on high-demanding, noise-critical applications. We introduce the concept of phase type and time type phase noise. The rules for…

As semiconductor devices continue to scale down, process vari- ations become more relevant for circuit design. Facing such variations, statistical static timing analysis is introduced to model variations more accurately so that the…

In digital communication systems different clock frequencies of transmitter and receiver usually is translated into cycle slips. Receivers might experience different sampling frequencies from transmitter due to manufacturing imperfection,…

In modern communication systems, the fidelity of analog-to-digital converters (ADCs) is limited by sampling clock jitter, i.e., small random timing deviations that undermine ideal sampling. Traditional scalar models often treat jitter as…

The family of multi-plane phase retrieval sensors, such as the curvature and nonlinear curvature wavefront sensors (WFS), contain tip/tilt information embedded in their signals. We have built a nonlinear curvature WFS to study different…

Space gravitational wave detectors employing laser interferometry between free-flying spacecraft differ in many ways from their laboratory counterparts. Among these differences is the fact that, in space, the end-masses will be moving…

Modern communication and computer systems require rapid (Gbps), efficient and large bandwidth data transfers. Agressive scaling of digital integrated systems allow buses and communication controller circuits to be integrated with the…

A method for analyzing sampling jitter in audio equipment is proposed. The method is based on the time-domain analysis where the time fluctuations of zero-crossing points in recorded sinusoidal waves are employed to characterize jitter.…

This paper examines synchronization of computer clocks connected via a data network and proposes a skewless algorithm to synchronize them. Unlike existing solutions, which either estimate and compensate the frequency difference (skew) among…

This paper describes the data acquisition and trigger system of the Thin Time-of-flight PET (TT-PET) scanner. The system is designed to read out in the order of 1000 pixel sensors used in the scanner and to provide a reference timing signal…

This paper addresses the mathematical modeling and compensation of stochastic discrete-time clock jitter in analog-to-digital converters (ADCs). We model the stochastic clock jitter as a first-order autoregressive (AR(1)) process, and we…

Power dissipation in integrated circuits is one of the major concerns to the research community, at the verge when more number of transistors are integrated on a single chip. The substantial source of power dissipation in sequential…

Co-prime arrays and samplers with multiple periods is a framework in which the co-prime structure is repeated multiple times. In this paper, the effects of perturbations in sampling locations on the difference set of the prototype co-prime…

The aim of this paper is to describe a way to improve the reliability of the measurement of the statistical parameters of the phase noise in a multi-ring oscillator-based TRNG. This is necessary to guarantee that the entropy rate is within…

Dampers are devices that reduce delay jitter in the context of time-sensitive networks, by delaying packets for the amount written in packet headers. Jitter reduction is required by some real-time applications; beyond this, dampers have the…

With technology scaling, lower supply voltages, and higher operating frequencies clock distribution networks become more and more vulnerable to transients faults. These faults can cause circuit-wide effects and thus, significantly…

In ultraviolet communications, the transceiver jitter effects have been ignored in previous studies, which can result in non-negligible performance degradation especially in vibration states or in mobile scenes. To address this issue, we…

The problem of clock offset estimation in a two-way timing exchange regime is considered when the likelihood function of the observation time stamps is exponentially distributed. In order to capture the imperfections in node oscillators,…