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New heterogeneous computing paradigms on dedicated hardware with increased parallelization, such as Field Programmable Gate Arrays (FPGAs), offer exciting solutions with large potential gains. The growing applications of machine learning…

The Restricted Boltzmann Machine (RBM) is a stochastic neural network capable of solving a variety of difficult tasks such as NP-Hard combinatorial optimization problems and integer factorization. The RBM architecture is also very compact;…

Machine Learning · Computer Science 2020-10-15 Saavan Patel , Philip Canoza , Sayeef Salahuddin

The growing demand for real-time processing in artificial intelligence applications, particularly those involving Convolutional Neural Networks (CNNs), has highlighted the need for efficient computational solutions. Conventional processors,…

Hardware Architecture · Computer Science 2025-10-16 Angelos Athanasiadis , Nikolaos Tampouratzis , Ioannis Papaefstathiou

Approximate multipliers (AppMults) are widely used in deep learning accelerators to reduce their area, delay, and power consumption. However, AppMults introduce arithmetic errors into deep learning models, necessitating a retraining process…

Machine Learning · Computer Science 2025-09-16 Chang Meng , Wayne Burleson , Giovanni De Micheli

Neural networks commonly execute on hardware accelerators such as NPUs and GPUs for their size and computation overhead. These accelerators are costly and it is hard to scale their resources to handle real-time workload fluctuations. We…

Machine Learning · Computer Science 2025-10-06 Jaemin Kim , Hongjun Um , Sungkyun Kim , Yongjun Park , Jiwon Seo

A multiply-accumulate (MAC) operation is the main computation unit for DSP applications. DSP blocks are one of the efficient solutions to implement MACs in FPGA's. However, since the DSP blocks have wide multiplier and adder blocks, MAC…

Hardware Architecture · Computer Science 2021-10-26 Ercan Kalali , Rene van Leuken

This study addresses the deployment challenges of integer-only quantized Transformers on resource-constrained embedded FPGAs (Xilinx Spartan-7 XC7S15). We enhanced the flexibility of our VHDL template by introducing a selectable resource…

Machine Learning · Computer Science 2026-04-22 Tianheng Ling , Chao Qian , Gregor Schiele

Low precision data representation is important to reduce storage size and memory access for convolutional neural networks (CNNs). Yet, existing methods have two major limitations: (1) requiring re-training to maintain accuracy for deep…

Signal Processing · Electrical Eng. & Systems 2020-03-10 Chen Wu , Mingyu Wang , Xinyuan Chu , Kun Wang , Lei He

Deep neural networks (DNNs) have the advantage that they can take into account a large number of parameters, which enables them to solve complex tasks. In computer vision and speech recognition, they have a better accuracy than common…

Machine Learning · Computer Science 2021-04-20 Lukas Baischer , Matthias Wess , Nima TaheriNejad

The severe on-chip memory limitations are currently preventing the deployment of the most accurate Deep Neural Network (DNN) models on tiny MicroController Units (MCUs), even if leveraging an effective 8-bit quantization scheme. To tackle…

Machine Learning · Computer Science 2020-08-13 Manuele Rusci , Marco Fariselli , Alessandro Capotondi , Luca Benini

Deep Neural Networks (DNNs) continue to grow in complexity with Large Language Models (LLMs) incorporating vast numbers of parameters. Handling these parameters efficiently in traditional accelerators is limited by data-transmission…

Hardware Architecture · Computer Science 2025-12-02 Swastik Bhattacharya , Sanjay Das , Anand Menon , Shamik Kundu , Arnab Raha , Kanad Basu

Implementing convolutional neural networks (CNNs) on field-programmable gate arrays (FPGAs) has emerged as a promising alternative to GPUs, offering lower latency, greater power efficiency and greater flexibility. However, this development…

Hardware Architecture · Computer Science 2025-10-21 Philippe Magalhães , Virginie Fresse , Benoît Suffran , Olivier Alata

Quantum Computing aims to streamline machine learning, making it more effective with fewer trainable parameters. This reduction of parameters can speed up the learning process and reduce the use of computational resources. However, in the…

Quantum Physics · Physics 2024-05-22 Michael Kölle , Timo Witter , Tobias Rohe , Gerhard Stenzel , Philipp Altmann , Thomas Gabor

With the emerging big data applications of Machine Learning, Speech Recognition, Artificial Intelligence, and DNA Sequencing in recent years, computer architecture research communities are facing the explosive scale of various data…

Hardware Architecture · Computer Science 2017-12-14 Chao Wang , Wenqi Lou , Lei Gong , Lihui Jin , Luchao Tan , Yahui Hu , Xi Li , Xuehai Zhou

At the CMS experiment, a growing reliance on the fast Monte Carlo application (FastSim) will accompany the high luminosity and detector granularity expected in Phase 2. The FastSim chain is roughly 10 times faster than the application based…

Instrumentation and Detectors · Physics 2025-01-15 Samuel Bein , Patrick Connor , Kevin Pedro , Peter Schleper , Moritz Wolf

The rising computational and energy demands of deep learning, particularly in large-scale architectures such as foundation models and large language models (LLMs), pose significant challenges to sustainability. Traditional gradient-based…

Machine Learning · Computer Science 2025-09-19 Mohammad Saleh Vahdatpour , Huaiyuan Chu , Yanqing Zhang

Multi-Chip-Modules (MCMs) reduce the design and fabrication cost of machine learning (ML) accelerators while delivering performance and energy efficiency on par with a monolithic large chip. However, ML compilers targeting MCMs need to…

Conventional multiply-accumulate (MAC) operations have long dominated computation time for deep neural networks (DNNs), espcially convolutional neural networks (CNNs). Recently, product quantization (PQ) has been applied to these workloads,…

Hardware Architecture · Computer Science 2024-04-01 Ahmed F. AbouElhamayed , Angela Cui , Javier Fernandez-Marques , Nicholas D. Lane , Mohamed S. Abdelfattah

Digital Compute-in-Memory (DCiM) accelerates neural networks by reducing data movement. Approximate DCiM can further improve power-performance-area (PPA), but demands accuracy-constrained co-optimization across coupled architecture and…

Machine Learning · Computer Science 2026-03-16 Yiqi Zhou , Yue Yuan , Yikai Wang , Bohao Liu , Qinxin Mei , Zhuohua Liu , Shan Shen , Wei Xing , Daying Sun , Li Li , Guozhu Liu

The accuracy of neural networks has greatly improved across various domains over the past years. Their ever-increasing complexity, however, leads to prohibitively high energy demands and latency in von Neumann systems. Several…

Hardware Architecture · Computer Science 2024-01-24 João Paulo C. de Lima , Asif Ali Khan , Luigi Carro , Jeronimo Castrillon
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