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Communication compression is an essential strategy for alleviating communication overhead by reducing the volume of information exchanged between computing nodes in large-scale distributed stochastic optimization. Although numerous…

Machine Learning · Computer Science 2025-03-19 Yutong He , Xinmeng Huang , Yiming Chen , Wotao Yin , Kun Yuan

Consider a device that is connected to an edge processor via a communication channel. The device holds local data that is to be offloaded to the edge processor so as to train a machine learning model, e.g., for regression or classification.…

Machine Learning · Computer Science 2019-06-13 Nicolas Skatchkovsky , Osvaldo Simeone

Many recent works have designed accelerators for Convolutional Neural Networks (CNNs). While digital accelerators have relied on near data processing, analog accelerators have further reduced data movement by performing in-situ computation.…

Machine Learning · Computer Science 2018-03-20 Anirban Nag , Ali Shafiee , Rajeev Balasubramonian , Vivek Srikumar , Naveen Muralimanohar

Relational data present in real world graph representations demands for tools capable to study it accurately. In this regard Graph Neural Network (GNN) is a powerful tool, wherein various models for it have also been developed over the past…

Hardware Architecture · Computer Science 2021-03-22 Robert Guirado , Akshay Jain , Sergi Abadal , Eduard Alarcón

In this paper, we revisit the communication vs. distributed computing trade-off, studied within the framework of MapReduce in [1]. An implicit assumption in the aforementioned work is that each server performs all possible computations on…

Information Theory · Computer Science 2017-05-26 Yahya H. Ezzeldin , Mohammed Karmoose , Christina Fragouli

We give lower bounds on the communication complexity required to solve several computational problems in a distributed-memory parallel machine, namely standard matrix multiplication, stencil computations, comparison sorting, and the Fast…

Data Structures and Algorithms · Computer Science 2013-09-24 Michele Scquizzato , Francesco Silvestri

Recently Resistive-RAM (RRAM) crossbar has been used in the design of the accelerator of convolutional neural networks (CNNs) to solve the memory wall issue. However, the intensive multiply-accumulate computations (MACs) executed at the…

Signal Processing · Electrical Eng. & Systems 2019-06-10 Xizi Chen , Jingyang Zhu , Jingbo Jiang , Chi-Ying Tsui

This paper provides an in-depth characterization of GPU-accelerated systems, to understand the interplay between overlapping computation and communication which is commonly employed in distributed training settings. Due to the large size of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-08 Seonho Lee , Jihwan Oh , Junkyum Kim , Seokjin Go , Jongse Park , Divya Mahajan

We consider the task of minimizing the sum of convex functions stored in a decentralized manner across the nodes of a communication network. This problem is relatively well-studied in the scenario when the objective functions are smooth, or…

Optimization and Control · Mathematics 2024-05-29 Dmitry Kovalev , Ekaterina Borodich , Alexander Gasnikov , Dmitrii Feoktistov

Mass spectrometry (MS) based omics data analysis require significant time and resources. To date, few parallel algorithms have been proposed for deducing peptides from mass spectrometry-based data. However, these parallel algorithms were…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-08-12 Fahad Saeed , Muhammad Haseeb , SS Iyengar

The exponential increase in Machine Learning (ML) model size and complexity has driven unprecedented demand for high-performance acceleration systems. As technology scaling enables the integration of thousands of computing elements onto a…

Hardware Architecture · Computer Science 2026-05-13 Luca Colagrande , Lorenzo Leone , Chen Wu , Tim Fischer , Raphael Roth , Luca Benini

Convolutional neural networks (CNNs) require a large number of multiply-accumulate (MAC) operations. To meet real-time constraints, they often need to be executed on specialized accelerators composed of an on-chip memory and a processing…

Hardware Architecture · Computer Science 2026-03-24 Benjamin Husson , Mohammed Belcaïd , Thomas Carle , Claire Pagetti

Recent trends in high-performance computing and deep learning have led to the proliferation of studies on large-scale deep neural network training. However, the frequent communication requirements among computation nodes drastically slows…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-27 Shuo Ouyang , Dezun Dong , Yemao Xu , Liquan Xiao

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better accuracy and the other with more compact sizing for energy…

Hardware Architecture · Computer Science 2021-07-07 Gokul Krishnan , Sumit K. Mandal , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

On-chip communication infrastructure is a central component of modern systems-on-chip (SoCs), and it continues to gain importance as the number of cores, the heterogeneity of components, and the on-chip and off-chip bandwidth continue to…

Hardware Architecture · Computer Science 2021-11-12 Andreas Kurth , Wolfgang Rönninger , Thomas Benz , Matheus Cavalcante , Fabian Schuiki , Florian Zaruba , Luca Benini

Energy in today's short-range wireless communication is mostly spent on the analog- and digital hardware rather than on radiated power. Hence, purely information-theoretic considerations fail to achieve the lowest energy per information bit…

Networking and Internet Architecture · Computer Science 2015-04-02 Christian Senning , Georgios Karakonstantis , Andreas Burg

RRAM-based multi-core systems improve the energy efficiency and performance of CNNs. Thereby, the distributed parallel execution of convolutional layers causes critical data dependencies that limit the potential speedup. This paper presents…

Hardware Architecture · Computer Science 2023-10-27 Rebecca Pelke , Nils Bosbach , Jose Cubero , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

Dilated and transposed convolutions are widely used in modern convolutional neural networks (CNNs). These kernels are used extensively during CNN training and inference of applications such as image segmentation and high-resolution image…

Memory bandwidth is known to be a performance bottleneck for FPGA accelerators, especially when they deal with large multi-dimensional data-sets. A large body of work focuses on reducing of off-chip transfers, but few authors try to improve…

Hardware Architecture · Computer Science 2024-01-23 Corentin Ferry , Nicolas Derumigny , Steven Derrien , Sanjay Rajopadhye

Reducing communication - either between levels of a memory hierarchy or between processors over a network - is a key component of performance optimization (in both time and energy) for many problems, including dense linear algebra, particle…

Data Structures and Algorithms · Computer Science 2020-03-03 Grace Dinh , James Demmel